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2020-09-11ARM: dts: renesas: Fix pin controller node namesGeert Uytterhoeven1-1/+1
According to Devicetree Specification v0.2 and later, Section "Generic Names Recommendation", the node name for a pin controller device node should be "pinctrl". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200821112351.5518-1-geert+renesas@glider.be
2020-07-17ARM: dts: sh73a0: Add missing clocks to sound nodeGeert Uytterhoeven1-0/+1
The device node for the FIFO-buffered Serial Interface sound node lacks the "clocks" property, as the DTS file didn't describe any clocks yet at its introduction. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200519075525.24742-1-geert+renesas@glider.be
2020-07-17ARM: dts: renesas: Fix SD Card/eMMC interface device node namesYoshihiro Shimoda1-3/+3
Fix the device node names as "mmc@". Fixes: 66474697923c ("ARM: dts: r7s72100: add sdhi to device tree") Fixes: a49f76cddaee ("ARM: dts: r7s9210: Add SDHI support") Fixes: 43304a5f5106 ("ARM: shmobile: r8a73a4: tidyup DT node naming") Fixes: 7d907894bfe3 ("ARM: shmobile: r8a7740: tidyup DT node naming") Fixes: 3ab2ea5fd1ce ("ARM: dts: r8a7742: Add SDHI nodes") Fixes: 63ce8a617b51 ("ARM: dts: r8a7743: Add SDHI controllers") Fixes: b591e323b271 ("ARM: dts: r8a7744: Add SDHI nodes") Fixes: d83010f87ab3 ("ARM: dts: r8a7744: Initial SoC device tree") Fixes: 7079131ef9b9 ("ARM: dts: r8a7745: Add SDHI controllers") Fixes: 0485da788028 ("ARM: dts: r8a77470: Add SDHI1 support") Fixes: 15aa5a95e820 ("ARM: dts: r8a77470: Add SDHI0 support") Fixes: f068cc816015 ("ARM: dts: r8a77470: Add SDHI2 support") Fixes: 14e1d9147d96 ("ARM: shmobile: r8a7778: tidyup DT node naming") Fixes: 2624705ceb7b ("ARM: shmobile: r8a7779: tidyup DT node naming") Fixes: b718aa448378 ("ARM: shmobile: r8a7790: tidyup DT node naming") Fixes: b7ed8a0dd4f1 ("ARM: shmobile: Add SDHI devices to r8a7791 DTSI") Fixes: ce01b14ecf19 ("ARM: dts: r8a7792: add SDHI support") Fixes: fc9ee228f500 ("ARM: dts: r8a7793: Add SDHI controllers") Fixes: b8e8ea127d00 ("ARM: shmobile: r8a7794: add SDHI DT support") Fixes: 33f6be3bf6b7 ("ARM: shmobile: sh73a0: tidyup DT node naming") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/1594382936-14114-1-git-send-email-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-04-27ARM: dts: shmobile: Update CMT1 compatible valuesGeert Uytterhoeven1-1/+1
New compatible values were introduced for the 48-bit CMT devices on SH-Mobile AG5 and R-Mobile A1, and the old "cmt-48"-based values were deprecated. However, the actual DTS files were never updated. See also commits: - 81b604c39997de91 ("dt-bindings: timer: renesas, cmt: Update CMT1 on sh73a0 and r8a7740"), - 8c1afba285a86b9d ("clocksource/drivers/sh_cmt: r8a7740 and sh73a0 SoC-specific match"), - 19d608458f4f3bb3 ("clocksource/drivers/sh_cmt: Document "cmt-48" as deprecated"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200420151553.22975-1-geert+renesas@glider.be
2019-12-31ARM: dts: sh73a0: Add missing clock-frequency for fixed clocksGeert Uytterhoeven1-0/+6
"clock-frequency" is a required property for devices nodes compatible with "fixed-clock", leading to warnings when running $ make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/clock/fixed-clock.yaml arch/arm/boot/dts/sh73a0-kzm9g.dt.yaml: extcki: 'clock-frequency' is a required property Fix this by adding the missing "clock-frequency" properties to the various clocks, to be overridden by the board DTS files when populated. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213162736.2160-1-geert+renesas@glider.be
2019-12-20ARM: dts: renesas: Group tuples in interrupt propertiesGeert Uytterhoeven1-61/+61
To improve human readability and enable automatic validation, the tuples in the various properties containing interrupt specifiers should be grouped. While "make dtbs_check" does not impose this yet for the "interrupts" property, it does for the "interrupt-map" property, leading to warnings like: pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long Fix this by grouping the tuples of the "interrupts" and "interrupt-map" properties using angle brackets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
2019-12-20ARM: dts: sh73a0: Add device node for ARM global timerGeert Uytterhoeven1-0/+7
Add a device node for the global timer, which is part of the Cortex-A9 MPCore. The global timer can serve as an accurate (3 ns) clock source for scheduling and delay loops. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191211135222.26770-3-geert+renesas@glider.be
2019-12-20ARM: dts: sh73a0: Rename twd clock to periph clockGeert Uytterhoeven1-2/+2
The "TWD" clock is actually the Cortex-A9 MPCore "PERIPHCLK" clock, which not only clocks the private timers and watchdogs (TWD), but also the interrupt controller and global timer. Hence rename it from "twd" to "periph". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20191211135222.26770-2-geert+renesas@glider.be
2018-11-28ARM: dts: r8a7740, emev2, sh73a0: Include SoC name in DTSIMagnus Damm1-1/+1
Update the R-Mobile A1 (r8a7740), Emma Mobile EV2 (emev2) and SH-Mobile AG5 (sh72a0) DTSI to include product name. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> [simon: squashed similar patches] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-07-23ARM: dts: convert to SPDX identifier for Renesas boardsWolfram Sang1-4/+1
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-05-14ARM: dts: sh73a0: Add missing interrupt-affinity to PMU nodeGeert Uytterhoeven1-2/+3
The PMU node references two interrupts, but lacks the interrupt-affinity property, which is required in that case: hw perfevents: no interrupt-affinity property for /pmu, guessing. Add the missing property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-04-18ARM: dts: renesas: replace toshiba, mmc-wrprotect-disable with disable-wpMasahiro Yamada1-2/+2
Follow up commit 788778b0d21a ("mmc: tmio: deprecate "toshiba, mmc-wrprotect-disable" DT property"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-29ARM: dts: sh73a0: Remove CMT renesas,channels-maskMagnus Damm1-3/+0
Update the DTS to remove the now deprecated "renesas,channels-mask" property. The channel information is now kept in the device driver and can easily be determined based on the compat string. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-10-16ARM: dts: sh73a0: Add clocks for CA9 CPU coresGeert Uytterhoeven1-0/+2
Improve hardware description by adding clocks properties to the device nodes corresponding to the CA9 CPU cores. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-05-15ARM: dts: sh73a0: update PFC node name to pin-controllerSimon Horman1-1/+1
The device trees for Renesas SoCs use either pfc or pin-controller as the node name for the PFC device. This patch is intended to take a step towards unifying the node name used as pin-controller which appears to be the more generic of the two and thus more in keeping with the DT specs. My analysis is that this is a user-visible change to the extent that kernel logs, and sysfs entries change from e6050000.pfc and pfc@e6050000 to e6050000.pin-controller and pin-controller@e6050000. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-01-03ARM: dts: sh73a0: Use SoC-specific compat string for mmcifSimon Horman1-1/+1
Use the SoC-specific compat string for mmcif in DT for the sh73a0 SoC. This is in keeping with the use of compat strings for mmcif for other Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-11-04ARM: dts: sh73a0: Remove skeleton.dtsi inclusionGeert Uytterhoeven1-2/+2
As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-05-30ARM: dts: sh73a0: Fix W=1 dtc warningsGeert Uytterhoeven1-1/+1
Warning (unit_address_vs_reg): Node /cache-controller has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-04-20ARM: dts: sh73a0: Correct interrupt type for ARM TWDGeert Uytterhoeven1-1/+1
The ARM TWD interrupt is a private peripheral interrupt (PPI), and per the ARM GIC documentation, whether the type for PPIs can be set is IMPLEMENTATION DEFINED. For SH-Mobile AG5 devices the PPI type cannot be set, and so when we attempt to set the type for the ARM TWD interrupt it fails. This has gone unnoticed because it fails silently, and because we cannot re-configure the type it has had no impact. Nevertheless fix the type for the TWD interrupt so that it matches the hardware configuration. Based on patches by Jon Hunter for Tegra20/30 and OMAP4. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-03-28ARM: dts: sh73a0: Remove unnecessary clock-output-names propertiesSimon Horman1-58/+29
* Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. The clock-output-names property is left in place for the zb_clk which is thus treated as a special case as the MSTP clock driver (clk-mstp.c) explicitly looks for a clock with node name zb_clk for the r8a73a4 and sh73a0 SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-09ARM: dts: sh73a0: Rename the serial port clock to fckLaurent Pinchart1-9/+9
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2016-02-09ARM: dts: sh73a0: use GIC_* definesSimon Horman1-84/+84
Use GIC_* defines for GIC interrupt cells in sh73a0 device tree. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-01ARM: shmobile: sh73a0: Add MSIOF device nodesGeert Uytterhoeven1-0/+44
The sh73a0 has 4 MSIOF devices, located in the A3SP power area. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-12-01ARM: shmobile: sh73a0: Add MSIOF clocksGeert Uytterhoeven1-12/+16
The 4 MSIOF clocks are MSTP clocks, and children of the SUB clock. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-11-25ARM: shmobile: sh73a0 dtsi: Add L2 cache-controller nodeGeert Uytterhoeven1-0/+14
Add the missing L2 cache-controller node, and link the CPU nodes to it. This will allow migration to the generic l2c OF initialization. The L2 cache is an ARM L2C-310 (r3p1), of size 512 KiB (64 KiB x 8 ways). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-08-05ARM: shmobile: sh73a0 dtsi: Add missing "gpio-ranges" to gpio nodeGeert Uytterhoeven1-0/+3
If a GPIO driver uses gpiochip_add_pin_range() (which is usually the case for GPIO/PFC combos), the GPIO hogging mechanism configured from DT doesn't work: requesting hog GPIO led1-high (chip sh73a0_pfc, offset 20) failed The actual error code is -517 == -EPROBE_DEFER. The problem is that PFC+GPIO registration is handled in multiple steps: 1. pinctrl_register(), 2. gpiochip_add(), 3. gpiochip_add_pin_range(). Configuration of the hogs is handled in gpiochip_add(): gpiochip_add of_gpiochip_add of_gpiochip_scan_hogs gpiod_hog gpiochip_request_own_desc __gpiod_request chip->request pinctrl_request_gpio pinctrl_get_device_gpio_range However, at this point the GPIO controller hasn't been added to pinctrldev_list yet, so the range can't be found, and the operation fails with -EPROBE_DEFER. To fix this, add a "gpio-ranges" property to the gpio device node, so the ranges are added by of_gpiochip_add_pin_range(), which is called by of_gpiochip_add() before the call to of_gpiochip_scan_hogs(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-05-11ARM: shmobile: sh73a0 dtsi: Use generic names for device nodesGeert Uytterhoeven1-4/+4
irqpin -> interrupt-controller Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-04-28ARM: shmobile: sh73a0 dtsi: Fix SCIFB namingGeert Uytterhoeven1-1/+1
The single SCIFB on SH-Mobile AG5 is called "scifb", not "scifb8". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24ARM: shmobile: sh73a0 dtsi: Add PM domain supportGeert Uytterhoeven1-2/+142
Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up all devices to their respective PM domains. Note that unlike on R-Mobile A1 (r8a7740), PM domain D4 can be powered down without ill effects on s2ram behavior, just like on SH-Mobile AP4 (sh7372). Hence we can postpone adding a (minimal) device node for the Coresight-ETM hardware block. The System Controller is also used by the R-Mobile Reset driver, which can now restart the system. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD nodeGeert Uytterhoeven1-0/+8
Add a node for the Private Timer and Watchdog, as found in the Cortex-A9 MPCore. Without this, there's no clocksource available during early kernel initialization, before cmt1 is initialized, leading to a lock-up if CONFIG_CPU_IDLE=y. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24ARM: shmobile: sh73a0 dtsi: Add Bus State Controller nodeGeert Uytterhoeven1-0/+11
Add a node for the Bus State Controller (BSC) on sh73a0, to which multiple external devices can be connected. The BSC is driven by the ZB clock, and located in PM domain A4S. A reference to the latter will be added later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24ARM: shmobile: sh73a0 dtsi: Add selectable sources to DIV6 clocksUlrich Hecht1-19/+45
Specifies clock sources and register bits. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [geert: Drop renesas,src-shift/renesas,src-width, pad to 4 or 8 parents] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24ARM: shmobile: sh73a0 dtsi: Add missing INTCA0 clock for irqpin moduleGeert Uytterhoeven1-0/+15
This clock drives the irqpin controller modules. Before, it was assumed enabled by the bootloader or reset state. By making it available to the driver, we make sure it gets enabled when needed, and allow it to be managed by system or runtime PM. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-24ARM: shmobile: sh73a0 dtsi: Set control-parent for all irqpin nodesLaurent Pinchart1-0/+3
The sh73a0 INTC can't mask interrupts properly most likely due to a hardware bug. Set the control-parent property to delegate masking to the parent interrupt controller. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-02-17Merge tag 'drivers-for-linus' of ↵Linus Torvalds1-0/+358
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "These are changes for drivers that are intimately tied to some SoC and for some reason could not get merged through the respective subsystem maintainer tree. This time around, much of this is for at91, with the bulk of it being syscon and udc drivers. Also, there's: - coupled cpuidle support for Samsung Exynos4210 - Renesas 73A0 common-clk work - of/platform changes to tear down DMA mappings on device destruction - a few updates to the TI Keystone knav code" * tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits) cpuidle: exynos: add coupled cpuidle support for exynos4210 ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary soc: ti: knav_qmss_queue: change knav_range_setup_acc_irq to static soc: ti: knav_qmss_queue: makefile tweak to build as dynamic module pcmcia: at91_cf: depend on !ARCH_MULTIPLATFORM soc: ti: knav_qmss_queue: export API calls for use by user driver of/platform: teardown DMA mappings on device destruction usb: gadget: at91_udc: Allocate udc instance usb: gadget: at91_udc: Update DT binding documentation usb: gadget: at91_udc: Rework for multi-platform kernel support usb: gadget: at91_udc: Simplify probe and remove functions usb: gadget: at91_udc: Remove non-DT handling code usb: gadget: at91_udc: Document DT clocks and clock-names property usb: gadget: at91_udc: Drop uclk clock usb: gadget: at91_udc: Fix clock names mfd: syscon: Add Atmel SMC binding doc mfd: syscon: Add atmel-smc registers definition mfd: syscon: Add Atmel Matrix bus DT binding documentation mfd: syscon: Add atmel-matrix registers definition clk: shmobile: fix sparse NULL pointer warning ...
2015-01-15ARM: shmobile: sh73a0 dtsi: Add memory-controller nodesGeert Uytterhoeven1-0/+16
Add device nodes for the two SDRAM Bus State Controllers. The SBSCs are located in the A4BC0 resp. A4BC1 PM domains, which must not be powered down, else the system will crash. References to the A4BC0 and A4BC1 PM domains will be added later. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-08ARM: shmobile: sh73a0 dtsi: Add SoC-specific FSI2 compatible propertyGeert Uytterhoeven1-1/+1
The FSI2 sound node used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21ARM: shmobile: sh73a0: add MSTP clock assignments to DTUlrich Hecht1-0/+29
Assigns clocks to cmt1, i2c*, mmcif, sdhi*, and scif*. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-12-21ARM: shmobile: sh73a0: Common clock framework DT descriptionUlrich Hecht1-0/+329
Declares all sh73a0 clocks supported by the legacy clock framework. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-11-19ARM: shmobile: sh73a0 dtsi: Add SoC-specific IIC compatible propertiesGeert Uytterhoeven1-5/+5
The IIC nodes used the generic compatible properties only. This causes the driver to fail when using Standard Speed, as the operational clock is driven by the 104 MHz HP clock: i2c-sh_mobile e6820000.i2c: timing values out of range: L/H=0x208/0x1bf i2c-sh_mobile: probe of e6820000.i2c failed with error -22 Add the SoC-specific compatible property to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-10-08Merge tag 'dt-for-linus' of ↵Linus Torvalds1-23/+1
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Arnd Bergmann: "As usual, this is the largest branch, though this time a little under half of the total changes with 307 individual non-merge changesets. The largest changes are the addition of new machines, in particular the Tegra based Chromebook, the Renesas r8a7794 SoC, and DT support for the old i.MX1 platform. Other changes include - at91: various sam9 and sama5 updates - exynos: much extended Peach Pi/Pit (Chromebook 2) support - keystone: new peripherals - meson: added DT for meson6 SoC - mvebu: new device support for Armada 370/375 - qcom: improved support for IPQ8064 and MSM8x60 - rockchip: much improved support for rk3288 - shmobile: lots of updates all over the place - sunxi: dts license change - sunxi: more a23 device support - vexpress: CLCD DT description" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (308 commits) ARM: DTS: meson: update DTSI to add watchdog node ARM: dts: keystone-k2l: fix mdio io start address ARM: dts: keystone-k2e: fix mdio io start address ARM: dts: keystone-k2e: update usb1 node for dma properties ARM: dts: keystone: fix io range for usb_phy0 Revert "Merge tag 'hix5hd2-dt-for-3.18' of git://github.com/hisilicon/linux-hisi into next/dt" Revert "ARM: dts: hix5hd2: add wdg node" ARM: dts: add rk3288 i2s controller ARM: vexpress: Add CLCD Device Tree properties ARM: bcm2835: add I2S pinctrl to device tree ARM: meson: documentation: add bindings documentation ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS ARM: dts: mt6589: Change compatible string for GIC ARM: dts: mediatek: Add compatible property for aquaris5 ARM: dts: mt6589-aquaris5: Add boot argument earlyprintk ARM: dts: mt6589: Fix typo in GIC unit address ARM: dts: Build dtb for Mediatek board ARM: dts: keystone: fix bindings for pcie and usb clock nodes ARM: dts: keystone: k2l: Fix chip selects for SPI devices ARM: dts: keystone: add dsp gpio controllers nodes ...
2014-09-11Merge tag 'renesas-dt-timers2-for-v3.18' of ↵Arnd Bergmann1-0/+10
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Second Round of Renesas ARM Based SoC DT Timers Updates for v3.18" from Simon Horman: * kzm9g-reference: Enable CMT1 in device tree * Use SoC-specific timer compat strings Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9g-reference: Enable CMT1 in device tree ARM: shmobile: sh73a0: Add CMT1 device to DT ARM: shmobile: r8a7740: Use SoC-specific 48-bit CMT compat string ARM: shmobile: r8a7779: Use SoC-specific TMU compat string ARM: shmobile: r8a7791: Use SoC-specific 48-bit CMT compat string ARM: shmobile: r7s72100: Use SoC-specific MTU2 compat string ARM: shmobile: r8a7790: Use SoC-specific 48-bit CMT compat string
2014-09-09ARM: shmobile: sh73a0: Add CMT1 device to DTUlrich Hecht1-0/+10
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22ARM: shmobile: sh73a0 dtsi: Move interrupt-parent to the topGeert Uytterhoeven1-23/+1
Add an "interrupt-parent = <&gic>;" at the top, which is inherited by all child nodes, so the "interrupt-parent" properties can be removed from the individual child nodes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-08-22ARM: shmobile: sh73a0: Update DTS to include CPU frequencyMagnus Damm1-0/+2
Add CPU Frequency information to the sh73a0 DTS file. This will allow us to use the shared C code on sh73a0 and KZM9G which reads out the clock frequency from DT and calculates the delay settings from there. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-07-12ARM: shmobile: sh73a0: Add SCIF nodesSimon Horman1-0/+72
This describes all of the SCIF hardware of the sh73a0. Each node is disabled and may be enabled as necessary by board DTS files. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-04-15ARM: shmobile: sh73a0: drop address cells from GIC nodeLucas Stach1-1/+0
This is likely a copy-and-paste error from the ARM GIC documentation, that has already been fixed. address-cells should have been set to 0, as with the size cells. As having those properties set to 0 is the same thing as not specifying them, drop them completely. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-19ARM: shmobile: sh73a0: Specify PFC interrupts in DTLaurent Pinchart1-0/+9
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-12ARM: shmobile: sh73a0: add FSI support via DTSIKuninori Morimoto1-0/+9
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-12-10ARM: shmobile: Use sh73a0 suffix for INTC compat stringMagnus Damm1-4/+4
Add "renesas,intc-irqpin-sh73a0" to the compatible string for the IRQ pins in case of sh73a0 INTC. This makes the INTC irqpin follow the same style as the other devices and also makes it more future proof. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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