diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-13 17:41:10 +0100 |
---|---|---|
committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-20 16:36:59 +0100 |
commit | c2e952ef5abb8054140e85eb4f54972a197d4673 (patch) | |
tree | 656fda6b31615d6444f607b6b19abf3a114494da /arch/arm/boot/dts/sh73a0.dtsi | |
parent | 8a481af10e6ab64411b5e5c3de3dc453c4e203a2 (diff) | |
download | linux-c2e952ef5abb8054140e85eb4f54972a197d4673.tar.bz2 |
ARM: dts: renesas: Group tuples in interrupt properties
To improve human readability and enable automatic validation, the tuples
in the various properties containing interrupt specifiers should be
grouped. While "make dtbs_check" does not impose this yet for the
"interrupts" property, it does for the "interrupt-map" property, leading
to warnings like:
pci@ee090000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 108, 4, 2048, 0, 0, 1, 5, 0, 108, 4, 4096, 0, 0, 2, 5, 0, 108, 4] is too long
pci@ee0d0000: interrupt-map:0: [0, 0, 0, 1, 5, 0, 113, 4, 2048, 0, 0, 1, 5, 0, 113, 4, 4096, 0, 0, 2, 5, 0, 113, 4] is too long
Fix this by grouping the tuples of the "interrupts" and "interrupt-map"
properties using angle brackets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20191213164115.3697-4-geert+renesas@glider.be
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Diffstat (limited to 'arch/arm/boot/dts/sh73a0.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sh73a0.dtsi | 122 |
1 files changed, 61 insertions, 61 deletions
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index f8494d168e84..8dad31f69fdd 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -117,14 +117,14 @@ <0xe6900020 1>, <0xe6900040 1>, <0xe6900060 1>; - interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -139,14 +139,14 @@ <0xe6900024 1>, <0xe6900044 1>, <0xe6900064 1>; - interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -161,14 +161,14 @@ <0xe6900028 1>, <0xe6900048 1>, <0xe6900068 1>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -183,14 +183,14 @@ <0xe690002c 1>, <0xe690004c 1>, <0xe690006c 1>; - interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp5_clks SH73A0_CLK_INTCA0>; power-domains = <&pd_a4s>; control-parent; @@ -201,10 +201,10 @@ #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6820000 0x425>; - interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks SH73A0_CLK_IIC0>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -215,10 +215,10 @@ #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6822000 0x425>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks SH73A0_CLK_IIC1>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -229,10 +229,10 @@ #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6824000 0x425>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp0_clks SH73A0_CLK_IIC2>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -243,10 +243,10 @@ #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6826000 0x425>; - interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks SH73A0_CLK_IIC3>; power-domains = <&pd_a3sp>; status = "disabled"; @@ -257,10 +257,10 @@ #size-cells = <0>; compatible = "renesas,iic-sh73a0", "renesas,rmobile-iic"; reg = <0xe6828000 0x425>; - interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp4_clks SH73A0_CLK_IIC4>; power-domains = <&pd_c5>; status = "disabled"; @@ -269,8 +269,8 @@ mmcif: mmc@e6bd0000 { compatible = "renesas,mmcif-sh73a0", "renesas,sh-mmcif"; reg = <0xe6bd0000 0x100>; - interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks SH73A0_CLK_MMCIF0>; power-domains = <&pd_a3sp>; reg-io-width = <4>; @@ -324,9 +324,9 @@ sdhi0: sd@ee100000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee100000 0x100>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks SH73A0_CLK_SDHI0>; power-domains = <&pd_a3sp>; cap-sd-highspeed; @@ -337,8 +337,8 @@ sdhi1: sd@ee120000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee120000 0x100>; - interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks SH73A0_CLK_SDHI1>; power-domains = <&pd_a3sp>; disable-wp; @@ -349,8 +349,8 @@ sdhi2: sd@ee140000 { compatible = "renesas,sdhi-sh73a0"; reg = <0xee140000 0x100>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp3_clks SH73A0_CLK_SDHI2>; power-domains = <&pd_a3sp>; disable-wp; |