summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/tegra/sor.c
AgeCommit message (Collapse)AuthorFilesLines
2022-04-25drm/display: Move SCDC helpers into display-helper libraryThomas Zimmermann1-1/+1
SCDC is the Status and Control Data Channel for HDMI. Move the SCDC helpers into display/ and split the header into files for core and helpers. Update all affected drivers. No functional changes. To avoid the proliferation of Kconfig options, SCDC is part of DRM's support for HDMI. If necessary, a new option could make SCDC an independent feature. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220421073108.19226-9-tzimmermann@suse.de
2022-04-25drm: Rename dp/ to display/Thomas Zimmermann1-1/+1
Rename dp/ to display/ to account for additional display-related helpers, such as HDMI. Update all related include statements. No functional changes. Various drivers, such as i915 and amdgpu, use similar naming scheme by putting code for video-output standards into a local display/ directory. The new directory's name is aligned with this convention. v2: * update commit message (Javier) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220421073108.19226-3-tzimmermann@suse.de
2022-01-17drm/dp: Move public DisplayPort headers into dp/Thomas Zimmermann1-1/+1
Move all public DisplayPort headers into dp/ and update users. No functional changes. v3: * rebased onto latest drm-tip Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220114114535.29157-5-tzimmermann@suse.de
2021-10-04Revert "drm/tegra: cleanup: drm_modeset_lock_all() --> ↵Sean Paul1-7/+4
DRM_MODESET_LOCK_ALL_BEGIN()" This reverts commit a2cd9947d99b54c959fce20dc19d81af53f4674e. This patchset breaks on intel platforms and was previously NACK'd by Ville. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Fernando Ramos <greenfoo@u92.eu> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20211002154542.15800-11-sean@poorly.run
2021-10-01drm/tegra: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()Fernando Ramos1-4/+7
As requested in Documentation/gpu/todo.rst, replace driver calls to drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and DRM_MODESET_LOCK_ALL_END() Signed-off-by: Fernando Ramos <greenfoo@u92.eu> Reviewed-by: Sean Paul <sean@poorly.run> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20210924064324.229457-7-greenfoo@u92.eu
2021-05-27drm/tegra: sor: Fix AUX device reference leakThierry Reding1-10/+19
In the case where the AUX provides an I2C-over-AUX DDC channel, a reference is taken on the AUX parent device of the DDC channel rather than the DDC channel like it would be for regular I2C controllers. To make sure the correct reference is dropped, move the unreferencing code into the SOR driver and make sure not to drop the I2C adapter reference in that case. Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-27drm/tegra: Get ref for DP AUX channel, not its ddc adapterLyude Paul1-3/+3
While we're taking a reference of the DDC adapter for a DP AUX channel in tegra_sor_probe() because we're going to be using that adapter with the SOR, now that we've moved where AUX registration happens the actual device structure for the DDC adapter isn't initialized yet. Which means that we can't really take a reference from it to try to keep it around anymore. This should be fine though, because we can just take a reference of its parent instead. v2: * Avoid calling i2c_put_adapter() in tegra_output_remove() for eDP/DP cases Signed-off-by: Lyude Paul <lyude@redhat.com> Fixes: 39c17ae60ea9 ("drm/tegra: Don't register DP AUX channels before connectors") Cc: Lyude Paul <lyude@redhat.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-tegra@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-17drm/tegra: sor: Fully initialize SOR before registrationThierry Reding1-14/+13
Before registering the SOR host1x client, make sure that it is fully initialized. This avoids a potential race condition between the SOR's probe and the host1x device initialization in cases where the SOR is the final sub-device to register to a host1x instance. Reported-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-05-17drm/tegra: sor: Do not leak runtime PM referencePavel Machek (CIP)1-4/+10
It's theoretically possible for the runtime PM reference to leak if the code fails anywhere between the pm_runtime_resume_and_get() and pm_runtime_put() calls, so make sure to release the runtime PM reference in that case. Practically this will never happen because none of the functions will fail on Tegra, but it's better for the code to be pedantic in case these assumptions will ever become wrong. Signed-off-by: Pavel Machek (CIP) <pavel@denx.de> [treding@nvidia.com: add commit message] Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-30drm/tegra: sor: Grab runtime PM reference across resetThierry Reding1-0/+7
The SOR resets are exclusively shared with the SOR power domain. This means that exclusive access can only be granted temporarily and in order for that to work, a rigorous sequence must be observed. To ensure that a single consumer gets exclusive access to a reset, each consumer must implement a rigorous protocol using the reset_control_acquire() and reset_control_release() functions. However, these functions alone don't provide any guarantees at the system level. Drivers need to ensure that the only a single consumer has access to the reset at the same time. In order for the SOR to be able to exclusively access its reset, it must therefore ensure that the SOR power domain is not powered off by holding on to a runtime PM reference to that power domain across the reset assert/deassert operation. This used to work fine by accident, but was revealed when recently more devices started to rely on the SOR power domain. Fixes: 11c632e1cfd3 ("drm/tegra: sor: Implement acquire/release for reset") Reported-by: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-01-15drm/tegra: Fix reference leak when pm_runtime_get_sync() failsQinglang Miao1-1/+1
The PM reference count is not expected to be incremented on return in these Tegra functions. However, pm_runtime_get_sync() will increment the PM reference count even on failure. Forgetting to put the reference again will result in a leak. Replace it with pm_runtime_resume_and_get() to keep the usage counter balanced. Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26drm/tegra: sor: Disable clocks on error in tegra_sor_init()Qinglang Miao1-2/+8
Fix the missing clk_disable_unprepare() before return from tegra_sor_init() in the error handling case. Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-10drm/tegra: sor: Ensure regulators are disabled on teardownMarc Zyngier1-35/+24
The Tegra SOR driver uses the devm infrastructure to request regulators, but enables them without registering them with the infrastructure. This results in the following splat if probing fails for any odd resaon (such as dependencies not being available): [ 8.974187] tegra-sor 15580000.sor: cannot get HDMI supply: -517 [ 9.414403] tegra-sor 15580000.sor: failed to probe HDMI: -517 [ 9.421240] ------------[ cut here ]------------ [ 9.425879] WARNING: CPU: 1 PID: 164 at drivers/regulator/core.c:2089 _regulator_put.part.0+0x16c/0x174 [ 9.435259] Modules linked in: tegra_drm(E+) cec(E) ahci_tegra(E) drm_kms_helper(E) drm(E) libahci_platform(E) libahci(E) max77620_regulator(E) xhci_tegra(E+) sdhci_tegra(E) xhci_hcd(E) libata(E) sdhci_pltfm(E) cqhci(E) fixed(E) usbcore(E) scsi_mod(E) sdhci(E) host1x(E) [ 9.459211] CPU: 1 PID: 164 Comm: systemd-udevd Tainted: G S D W E 5.9.0-rc7-00298-gf6337624c4fe #1980 [ 9.469285] Hardware name: NVIDIA Jetson TX2 Developer Kit (DT) [ 9.475202] pstate: 80000005 (Nzcv daif -PAN -UAO BTYPE=--) [ 9.480784] pc : _regulator_put.part.0+0x16c/0x174 [ 9.485581] lr : regulator_put+0x44/0x60 [ 9.489501] sp : ffffffc011d837b0 [ 9.492814] x29: ffffffc011d837b0 x28: ffffff81dd085900 [ 9.498141] x27: ffffff81de1c8ec0 x26: ffffff81de1c8c10 [ 9.503464] x25: ffffff81dd085800 x24: ffffffc008f2c6b0 [ 9.508790] x23: ffffffc0117373f0 x22: 0000000000000005 [ 9.514101] x21: ffffff81dd085900 x20: ffffffc01172b098 [ 9.515822] ata1: SATA link down (SStatus 0 SControl 300) [ 9.519426] x19: ffffff81dd085100 x18: 0000000000000030 [ 9.530122] x17: 0000000000000000 x16: 0000000000000000 [ 9.535453] x15: 0000000000000000 x14: 000000000000038f [ 9.540777] x13: 0000000000000003 x12: 0000000000000040 [ 9.546105] x11: ffffff81eb800000 x10: 0000000000000ae0 [ 9.551417] x9 : ffffffc0106fea24 x8 : ffffff81de83e6c0 [ 9.556728] x7 : 0000000000000018 x6 : 00000000000003c3 [ 9.562064] x5 : 0000000000005660 x4 : 0000000000000000 [ 9.567392] x3 : ffffffc01172b388 x2 : ffffff81de83db80 [ 9.572702] x1 : 0000000000000000 x0 : 0000000000000001 [ 9.578034] Call trace: [ 9.580494] _regulator_put.part.0+0x16c/0x174 [ 9.584940] regulator_put+0x44/0x60 [ 9.588522] devm_regulator_release+0x20/0x2c [ 9.592885] release_nodes+0x1c8/0x2c0 [ 9.596636] devres_release_all+0x44/0x6c [ 9.600649] really_probe+0x1ec/0x504 [ 9.604316] driver_probe_device+0x100/0x170 [ 9.608589] device_driver_attach+0xcc/0xd4 [ 9.612774] __driver_attach+0xb0/0x17c [ 9.616614] bus_for_each_dev+0x7c/0xd4 [ 9.620450] driver_attach+0x30/0x3c [ 9.624027] bus_add_driver+0x154/0x250 [ 9.627867] driver_register+0x84/0x140 [ 9.631719] __platform_register_drivers+0xa0/0x180 [ 9.636660] host1x_drm_init+0x60/0x1000 [tegra_drm] [ 9.641629] do_one_initcall+0x54/0x2d0 [ 9.645490] do_init_module+0x68/0x29c [ 9.649244] load_module+0x2178/0x26c0 [ 9.652997] __do_sys_finit_module+0xb0/0x120 [ 9.657356] __arm64_sys_finit_module+0x2c/0x40 [ 9.661902] el0_svc_common.constprop.0+0x80/0x240 [ 9.666701] do_el0_svc+0x30/0xa0 [ 9.670022] el0_svc+0x18/0x50 [ 9.673081] el0_sync_handler+0x90/0x318 [ 9.677006] el0_sync+0x158/0x180 [ 9.680324] ---[ end trace 90f6c89d62d85ff6 ]--- Instead, let's register a callback that will disable the regulators on teardown. This allows for the removal of the .remove callbacks, which are not needed anymore. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-09drm/tegra: sor: Don't warn on probe deferralJon Hunter1-4/+3
Deferred probe is an expected return value for tegra_output_probe(). Given that the driver deals with it properly, there's no need to output a warning that may potentially confuse users. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17drm/tegra: Properly reference count the DDC I2C adapterThierry Reding1-1/+6
Use the of_get_i2c_adapter_by_node(), which is similar to the existing call to of_find_i2c_adapter_by_node() except that it also takes a reference to the owner module of the I2C adapter. In order to properly balance this out, call i2c_put_adapter() to release the reference to the I2C adapter and its owner module. For the special case where the DDC comes from the DPAUX, care must be taken to perform the same steps (i.e. get_device() and module_get()) so that the reference counts are all balanced. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-17drm/tegra: sor: Use correct power supply names for HDMIThierry Reding1-2/+2
The hardware documentation uses AVDD_IO_HDMI_DP and VDD_HDMI_DP_PLL to denote the two power supplies that drive the HDMI/DP outputs of the SOR. Use these names instead of the arbitrary AVDD_IO and VDD_PLL names that were used previously to avoid confusion. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-04-17drm/tegra: Clean up GPIO includesLinus Walleij1-1/+0
The Tegra DRM drivers includes the legacy GPIO headers <linux/gpio.h> and <linux/of_gpio.h> but what it really uses is <linux/gpio/consumer.h> since only gpio_desc structs are ever referenced. Include the right header on the top level tegra/drm.h file and drop all the surplus includes. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200415122427.111769-1-linus.walleij@linaro.org
2020-04-02drm/tegra: Use simple encoderThomas Zimmermann1-6/+2
The tegra driver uses empty implementations for its encoders. Replace the code with the generic simple encoder. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200305155950.2705-16-tzimmermann@suse.de
2020-03-18drm/tegra: remove checks for debugfs functions return valueWambui Karuga1-10/+1
Since 987d65d01356 (drm: debugfs: make drm_debugfs_create_files() never fail) there is no need to check the return value of drm_debugfs_create_files(). Therefore, remove the return checks and error handling of the drm_debugfs_create_files() function from various debugfs init functions in drm/tegra and have them return 0 directly. v2: remove conversion of tegra_debugfs_init() to void to avoid build breakage. References: https://lists.freedesktop.org/archives/dri-devel/2020-February/257183.html Signed-off-by: Wambui Karuga <wambui.karugax@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20200310133121.27913-2-wambui.karugax@gmail.com
2020-02-07Merge tag 'drm/tegra/for-5.6-rc1-fixes' of ↵Dave Airlie1-22/+27
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Fixes for v5.6-rc1 These are a couple of quick fixes for regressions that were found during the first two weeks of the merge window. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200206172753.2185390-1-thierry.reding@gmail.com
2020-01-31drm/tegra: sor: Initialize runtime PM before useThierry Reding1-15/+17
Commit fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") replaced the generic runtime PM usage by a host1x bus-specific implementation in order to work around some assumptions baked into runtime PM that are in conflict with the requirements in the Tegra DRM driver. Unfortunately the new runtime PM callbacks are not setup yet at the time when the SOR driver first needs to resume the device to register the SOR pad clock, and accesses to register will cause the system to hang. Note that this only happens on Tegra124 and Tegra210 because those are the only SoCs where the SOR pad clock is registered from the SOR driver. Later generations use a SOR pad clock provided by the BPMP. Fix this by moving the registration of the SOR pad clock after the host1x client has been registered. That's somewhat suboptimal because this could potentially, though it's very unlikely, cause the Tegra DRM to be probed if the SOR happens to be the last subdevice to register, only to be immediately removed again if the SOR pad output clock fails to register. That's just a minor annoyance, though, and doesn't justify implementing a workaround. Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-31drm/tegra: sor: Disable runtime PM on probe failureThierry Reding1-6/+8
If the driver fails to probe, make sure to disable runtime PM again. While at it, make the cleanup code in ->remove() symmetric. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-31drm/tegra: sor: Suspend on clock registration failureThierry Reding1-6/+7
Make sure the SOR module is suspenden after we fail to register the SOR pad output clock. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-15Merge tag 'drm/tegra/for-5.6-rc1' of ↵Dave Airlie1-62/+101
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.6-rc1 This contains a small set of mostly fixes and some minor improvements. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Thierry Reding <thierry.reding@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200111004835.2412858-1-thierry.reding@gmail.com
2020-01-10drm/tegra: output: Implement system suspend/resumeThierry Reding1-0/+17
Implement generic system suspend/resume functions that can be used with any output type. Currently this only implements disabling and enabling of the IRQ functionality across system suspend/resume. This prevents an interrupt from happening before the display driver has fully resumed. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10drm/tegra: sor: Mark PM functions as __maybe_unusedArnd Bergmann1-2/+2
Without CONFIG_PM, some functions cause harmless warnings: drivers/gpu/drm/tegra/sor.c:3984:12: error: 'tegra_sor_resume' defined but not used [-Werror=unused-function] static int tegra_sor_resume(struct device *dev) ^~~~~~~~~~~~~~~~ drivers/gpu/drm/tegra/sor.c:3970:12: error: 'tegra_sor_suspend' defined but not used [-Werror=unused-function] static int tegra_sor_suspend(struct device *dev) ^~~~~~~~~~~~~~~~~ Mark these as __maybe_unused so the compiler can drop them silently. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10drm/tegra: Do not implement runtime PMThierry Reding1-66/+88
The Tegra DRM driver heavily relies on the implementations for runtime suspend/resume to be called at specific times. Unfortunately, there are some cases where that doesn't work. One example is if the user disables runtime PM for a given subdevice. Another example is that the PM core acquires a reference to runtime PM during system sleep, effectively preventing devices from going into low power modes. This is intentional to avoid nasty race conditions, but it also causes system sleep to not function properly on all Tegra systems. Fix this by not implementing runtime PM at all. Instead, a minimal, reference-counted suspend/resume infrastructure is added to the host1x bus. This has the benefit that it can be used regardless of the system power state (or any transitions we might be in), or whether or not the user allows runtime PM. Atomic modesetting guarantees that these functions will end up being called at the right point in time, so the pitfalls for the more generic runtime PM do not apply here. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-10gpu: host1x: Rename "parent" to "host"Thierry Reding1-1/+1
Rename the host1x clients' parent to "host" because that more closely describes what it is. The parent can be confused with the parent device in terms of the device hierarchy. Subsequent patches will add a new member that refers to the parent in that hierarchy. Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-01-07drm/tegra: Provide ddc symlink in output connector sysfs directoryAndrzej Pietrasiewicz1-3/+4
Use the ddc pointer provided by the generic connector. Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Emil Velikov <emil.velikov@collabora.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200102132300.24309-2-andrzej.p@collabora.com
2019-12-04drm/tegra: sor: Make the +5V HDMI supply optionalThierry Reding1-2/+16
The SOR supports multiple display modes, but only when driving an HDMI monitor does it make sense to control the +5V power supply. eDP and DP don't need this, so make it optional. This fixes a crash observed during system suspend/resume. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-12-04drm/tegra: sor: Implement system suspend/resumeThierry Reding1-5/+19
Upon system suspend, make sure the +5V HDMI regulator is disabled. This avoids potentially leaking current to the HDMI connector. This also makes sure that upon resume the regulator is enabled again, which in some cases is necessary to properly restore the state of the supply on resume. Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Introduce audio enable/disable callbacksThierry Reding1-2/+8
In order to support different modes (DP in addition to HDMI), split out the audio setup/teardown into callbacks. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Extract common audio enabling codeThierry Reding1-18/+25
The code to enable audio support is split into two parts, one being generic for the SOR and another part that is specific whether the SOR is in HDMI mode or in DP mode. Split out the common part in preparation for reusing the code in DP mode. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Avoid timeouts on unplug eventsThierry Reding1-3/+10
When the SOR is disabled in DP mode as part of an unplug event, do not attempt to power the DP link down. Powering down the link requires the DPAUX to transmit AUX messages which only works if there's a connected sink. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Unify eDP and DP supportThierry Reding1-347/+74
The SOR0 on Tegra210 does, contrary to what was previously assumed, in fact support DisplayPort. The difference between SOR0 and SOR1 is that the latter supports audio and HDCP over DP, whereas the former doesn't. The code for eDP and DP is now almost identical and the differences can easily be parameterized based on the presence of a panel. There is no need any longer to duplicate the code. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Use correct I/O pad for DPThierry Reding1-0/+1
The correct I/O pad needs to be powered up before DP can be used. Make sure the correct default is set for Tegra generations where the I/O pad cannot be derived from the SOR instance. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Unify clock setup for eDP, HDMI and DPThierry Reding1-11/+81
With the clocks modelled consistently across SoC generations, the clock setup for eDP, HDMI and DP can now be unified. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Support DisplayPort on Tegra194Thierry Reding1-0/+5
Reuse parameters from earlier generations to support DisplayPort on Tegra194. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Deduplicate connector type detection codeThierry Reding1-109/+109
The connector type detection code is duplicated in two places. Keeping both places in sync is an extra maintenance burden that can be avoided by comparing the connector type operations that are set upon the first detection. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Implement pad clock for all SOR instancesThierry Reding1-6/+14
So far the pad clock was only needed on the second SOR instance. The clock does exist for all SOR instances, though, so make sure it is always implemented. This prepares for further unification of the code in subsequent patches. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Use correct SOR index on Tegra210Thierry Reding1-0/+5
The device tree bindings for the Tegra210 SOR don't require the controller instance to be defined, since the instance can be derived from the compatible string. The index is never used on Tegra210, so we got away with it not getting set. However, subsequent patches will change that, so make sure the proper index is used. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Remove tegra186-sor1 supportThierry Reding1-18/+0
It turns out that SOR1 is just another instance of the same block as the SOR0, so there is no need to distinguish them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Add DisplayPort supportThierry Reding1-2/+341
Add support for regular DisplayPort on Tegra210 and Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Filter eDP ratesThierry Reding1-0/+26
The SOR found on Tegra SoCs does not support all the rates potentially advertised by eDP 1.4. Make sure that the rates that are not supported are filtered out. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Stabilize eDPThierry Reding1-89/+49
Rework eDP code to correspond more closely to what's documented. This also improves the reliability of modesets. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Hook up I2C-over-AUX to outputThierry Reding1-0/+2
This is necessary for the output abstraction to retrieve a list of valid modes from the EDID of a connected panel/monitor. This will be useful in conjunction with DisplayPort support that will be added in a subsequent patch, so that the driver can read EDID via the AUX channel. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: sor: Use DP link training helpersThierry Reding1-216/+468
Make use of the DP link training helpers to implement full and fast link training. While at it, refactor some of the code and remove various code sequences that are not necessary. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Turn link capabilities into booleansThierry Reding1-2/+2
Rather than storing capabilities as flags in an integer, use a separate boolean per capability. This simplifies the code that checks for these capabilities. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Track link capabilities alongside settingsThierry Reding1-14/+14
Store capabilities in max_* fields and add separate fields for the currently selected settings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-24drm/tegra: sor: Move register programming out of ->init()Thierry Reding1-13/+11
The hardware is not guaranteed to be enabled during execution of the tegra_sor_init() function, which can lead to a crash on some Tegra SoCs. Fix this by moving all register programming into code that is guaranteed to only be executed when the hardware is enabled. Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-29 21:01:05 +0000