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path: root/drivers/gpu/drm/nouveau/nvkm/engine/gr/gp10b.c
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2022-11-09drm/nouveau/gr/gf100-: move some init to init_exception2()Ben Skeggs1-0/+1
Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/gr/gf100-: move some init to init_rop_exceptions()Ben Skeggs1-0/+1
Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2022-11-09drm/nouveau/gr/gf100-: move reset during golden ctx init to fecs_reset()Ben Skeggs1-0/+1
Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11drm/nouveau/gr: switch to instanced constructorBen Skeggs1-2/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
2020-07-24drm/nouveau/gr/gm200-: explicitly handle nofwBen Skeggs1-1/+2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-23drm/nouveau/gr/gp10b: Use gp100_grctx and gp100_gr_zbcThierry Reding1-2/+2
gp10b doesn't have all the registers that gp102_gr_zbc wants to access, which causes IBUS MMIO faults to occur. Avoid this by using the gp100 variants of grctx and gr_zbc. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/acr: implement new subdev to replace "secure boot"Ben Skeggs1-0/+6
ACR is responsible for managing the firmware for LS (Low Secure) falcons, this was previously handled in the driver by SECBOOT. This rewrite started from some test code that attempted to replicate the procedure RM uses in order to debug early Turing ACR firmwares that were provided by NVIDIA for development. Compared with SECBOOT, the code is structured into more individual steps, with the aim of making the process easier to follow/debug, whilst making it possible to support newer firmware versions that may have a different binary format or API interface. The HS (High Secure) binary(s) are now booted earlier in device init, to match the behaviour of RM, whereas SECBOOT would delay this until we try to boot the first LS falcon. There's also additional debugging features available, with the intention of making it easier to solve issues during FW/HW bring-up in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-01-15drm/nouveau/gr/gf100-: select implementation based on available FWBen Skeggs1-1/+28
This will allow for further customisation of the subdev depending on what firmware is available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gp102-: setup stencil zbcBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gp100-: use correct registers for zbc colour/depth setupBen Skeggs1-0/+1
These were missed the first time around due to the driver version I traced using the older registers still. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: calculate and use sm mapping tableBen Skeggs1-0/+1
There's a number of places that require this data, so let's separate out the calculations to ensure they remain consistent. This is incorrect for GM200 and newer, but will produce the same results as we did before. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: port tile mapping calculations from NVGPUBen Skeggs1-0/+1
There's also a couple of hardcoded tables for a couple of very specific configurations that NVGPU's algorithm didn't work for. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise trap_mpBen Skeggs1-0/+1
Required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise tpc_mask + apply fixes from tracesBen Skeggs1-0/+2
We weren't placing higher TPC IDs in the right place on some configurations. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: delete duplicated init codeBen Skeggs1-1/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_shader_exceptionsBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_504430Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_tex_hww_esrBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_419cc0 + apply fixes from tracesBen Skeggs1-0/+1
Pulled some init out of main per-GPC/TPC loops to match RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_sked_hww_esrBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_ds_hww_esr_2Ben Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_fecs_exceptions + apply fixes from tracesBen Skeggs1-0/+1
The value for GF100 has changed here, but it matches RM now. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_num_active_ltcsBen Skeggs1-9/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_zcullBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/gr/gf100-: virtualise init_vsc_stream_masterBen Skeggs1-0/+1
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-04-06drm/nouveau/gr: support for GP10BAlexandre Courbot1-0/+59
GR is similar to GP100, with a few unavailable registers. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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