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path: root/drivers/gpu/drm/i915/display/intel_fbc.c
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2021-09-30drm/i915/display: Fix glitches when moving cursor with PSR2 selective fetch e...José Roberto de Souza1-2/+2
2021-09-30drm/i915/fbc: Allow FBC with Yf tilingVille Syrjälä1-0/+1
2021-09-24drm/i915/fbc: Allow higher compression limits on FBC1Ville Syrjälä1-13/+7
2021-09-24drm/i915/fbc: Implement Wa_16011863758 for icl+Ville Syrjälä1-2/+10
2021-09-24drm/i915/fbc: Align FBC segments to 512B on glk+Ville Syrjälä1-3/+11
2021-09-24drm/i915/fbc: Rework cfb stride/size calculationsVille Syrjälä1-59/+121
2021-08-20drm/i915/fbc: Polish the skl+ FBC stride override handlingVille Syrjälä1-13/+14
2021-08-20drm/i915/fbc: Move the "recompress on activate" to a central placeVille Syrjälä1-9/+11
2021-08-20drm/i915/fbc: Extract intel_fbc_update()Ville Syrjälä1-2/+24
2021-08-20drm/i915/fbc: Rewrite the FBC tiling check a bitVille Syrjälä1-4/+2
2021-08-16drm/i915: Nuke ORIGIN_GTTJosé Roberto de Souza1-9/+1
2021-07-20drm/i915/display: Disable FBC when PSR2 is enabled display 12 and newerJosé Roberto de Souza1-2/+2
2021-07-02drm/i915/display: check if compressed_llb was allocatedMatthew Auld1-1/+2
2021-06-24drm/i915/fbc: Allocate llb before cfbVille Syrjälä1-9/+9
2021-06-24drm/i915/fbc: Make the cfb allocation loop a bit more legibleVille Syrjälä1-25/+26
2021-06-24drm/i915/fbc: Extract intel_fbc_stolen_end()Ville Syrjälä1-7/+12
2021-06-24drm/i915/fbc: Introduce g4x_dpfc_ctl_limit()Ville Syrjälä1-33/+25
2021-06-24drm/i915/fbc: Handle 16bpp compression limit betterVille Syrjälä1-4/+2
2021-06-24drm/i915/fbc: Don't pass around the mm nodeVille Syrjälä1-7/+6
2021-06-24drm/i915/fbc: Embed the compressed_llb nodeVille Syrjälä1-20/+9
2021-06-24drm/i915/fbc: Extract intel_fbc_program_cfb()Ville Syrjälä1-18/+28
2021-06-24drm/i915/fbc: s/threshold/limit/Ville Syrjälä1-25/+25
2021-05-07drm/i915/xelpd: First stab at DPT supportVille Syrjälä1-3/+3
2021-05-05drm/i915: Don't include intel_de.h from intel_display_types.hVille Syrjälä1-0/+1
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi1-10/+10
2021-04-14drm/i915: Restore lost glk FBC 16bpp w/aVille Syrjälä1-1/+1
2021-04-14drm/i915/display: Eliminate IS_GEN9_{BC,LP}Matt Roper1-3/+4
2021-03-29drm/i915: Unify the FB and plane state view information into one structImre Deak1-3/+3
2021-03-23drm/i915/display: Simplify GLK display version testsMatt Roper1-2/+2
2021-03-23drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper1-28/+28
2021-03-23drm/i915/display: Convert gen5/gen6 tests to IS_IRONLAKE/IS_SANDYBRIDGEMatt Roper1-3/+3
2021-01-14drm/i915/display: fix the uint*_t types that have crept inJani Nikula1-1/+1
2020-12-02Revert "drm/i915/display/fbc: Disable fbc by default on TGL"Uma Shankar1-7/+0
2020-12-02drm/i915/display/tgl: Disable FBC with PSR2Uma Shankar1-0/+12
2020-10-19drm/i915/display/fbc: Implement WA 22010751166José Roberto de Souza1-0/+7
2020-08-28Merge tag 'drm-intel-next-2020-08-24-1' of git://anongit.freedesktop.org/drm/...Dave Airlie1-0/+17
2020-08-17drm/i915/display/fbc: Disable fbc by default on TGLUma Shankar1-0/+7
2020-08-17drm/i915/fbc: Limit cfb to the first 256MiB of stolen on g4x+Ville Syrjälä1-0/+10
2020-08-05Merge tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-38/+66
2020-08-04Merge tag 'uninit-macro-v5.9-rc1' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-1/+1
2020-07-16treewide: Remove uninitialized_var() usageKees Cook1-1/+1
2020-07-14drm/i915: Recalculate FBC w/a stride when neededVille Syrjälä1-7/+26
2020-07-14drm/i915: Recalculate FBC w/a stride when neededVille Syrjälä1-7/+26
2020-07-09drm/i915: Move all FBC w/as to .init_clock_gating()Ville Syrjälä1-15/+0
2020-07-06drm/i915/fbc: Fix fence_y_offset handlingVille Syrjälä1-22/+10
2020-07-03drm/i915/fbc: Fix nuke for pre-snb platformsVille Syrjälä1-1/+33
2020-07-03drm/i915/fbc: Use the correct plane strideVille Syrjälä1-6/+10
2020-06-30drm/i915/fbc: Reduce fbc1 compression interval to 1 secondVille Syrjälä1-2/+2
2020-06-30drm/i915/fbc: Store the fbc1 compression interval in the paramsVille Syrjälä1-7/+6
2020-06-30drm/i915/fbc: Parametrize FBC_CONTROLVille Syrjälä1-4/+4
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