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path:
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/
drivers
/
clk
/
socfpga
/
clk-agilex.c
Age
Commit message (
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Author
Files
Lines
2022-01-05
clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_r...
Cai Huoqing
1
-3
/
+1
2021-09-24
clk: socfpga: agilex: fix duplicate s2f_user0_clk
Dinh Nguyen
1
-9
/
+0
2021-07-26
clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
Dinh Nguyen
1
-1
/
+1
2021-07-26
clk: socfpga: agilex: fix up s2f_user0_clk representation
Dinh Nguyen
1
-0
/
+9
2021-07-26
clk: socfpga: agilex: fix the parents of the psi_ref_clk
Dinh Nguyen
1
-4
/
+4
2021-06-27
clk: agilex/stratix10: add support for the 2nd bypass
Dinh Nguyen
1
-1
/
+3
2021-06-27
clk: agilex/stratix10: fix bypass representation
Dinh Nguyen
1
-11
/
+46
2021-06-27
clk: agilex/stratix10: remove noc_clk
Dinh Nguyen
1
-17
/
+15
2021-03-30
clk: socfpga: Fix code formatting
Stephen Boyd
1
-1
/
+2
2021-03-30
clk: socfpga: Convert to s10/agilex/n5x to use clk_hw
Dinh Nguyen
1
-54
/
+60
2021-02-12
clk: socfpga: agilex: add clock driver for eASIC N5X platform
Dinh Nguyen
1
-2
/
+86
2020-09-22
clk: socfpga: agilex: Remove unused variable 'cntr_mux'
YueHaibing
1
-13
/
+0
2020-06-19
clk: socfpga: agilex: mpu_l2ram_clk should be mpu_ccu_clk
Dinh Nguyen
1
-1
/
+1
2020-06-19
clk: socfpga: agilex: add nand_x_clk and nand_ecc_clk
Dinh Nguyen
1
-1
/
+5
2020-05-26
clk: socfpga: agilex: add clock driver for the Agilex platform
Dinh Nguyen
1
-0
/
+454