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authorArnd Bergmann <arnd@arndb.de>2022-11-29 21:16:46 +0100
committerArnd Bergmann <arnd@arndb.de>2022-11-30 15:01:31 +0100
commitbcbc46852835a64d002093424faf5111bce8864a (patch)
treedb4ee4cf1f99abf3047ee19ead7d9e5679338f79 /include/dt-bindings
parent0c5f21291c1ed0d57c868d16bcd32acf1a5fea93 (diff)
parentafcd946be11c937ed400b1d4727e2b5fe04ba693 (diff)
downloadlinux-bcbc46852835a64d002093424faf5111bce8864a.tar.bz2
Merge tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
Qualcomm ARM64 DTS updates for 6.2 This introduces support for SM4250, SM6115, SM6375 and SDM670 platforms and Sony Xperia 10 IV, Google Pixel 3a, OnePlus 3, OnePlus 3T, Google Pazquel and OnePlus Nord N100. A wide variety of updates to align with DeviceTree bindings across many/most platforms is introduced, and incorrectly styled comments are adjusted across the tree. Apps RSC is added to the cluster-idle power-domain across SM8150, SM8250, SM8350 and SM8450, to ensure sleep and wake votes are flushed as the last core is being powered down. Remoteproc firmware patches are aligned with agreed upon structure used in linux-firmware across Inforce 6560, Lenovo Miix 630, various Sony Xperia devices and Samsung Galaxy Book2 (although these are not available in linux-firmware today). On IPQ8074 CPU clocks are added, thermal zones are introduced and vqmmc supply is specified for the HK01 board. Alcatel OneTouch Idol 3 gains LED nodes and Samsung Galaxy A3U gained vibrator support. The application subsystem's IOMMU and the display subsystem is enabled for MSM8953. A new CPU frequency table is introduced for MSM8996Pro, to properly describe it separate of MSM8996. The GPU opp-table is extended as well. On SC7180 USB is marked as a wakeup source, USB gains required-opps to ensure that the core voltage rail is voted for as needed. The description of the fingerprint sensor in Trogdor is corrected. On SC7280 Wake-on-WLAN is introduced, and PHY parameters for the SNPS USB PHY is defined across SC7280. The memory map across Google Herobrine is adjusted, to regain unused memory on the WiFi SKUs. A LTE SKU of the Evoker board is introduced and the bard gains touchscreen. NVME support is disabled on Villager boards, as it's not used. PCIe support is introduced on SC8280XP, with NVMe, SDX55 (5G) and WiFi enabled on the Lenovo Thinkpad X13s and Compute Reference Device. ADCs and thermal zones are intrduced for the same. Lenovo Thinkpad X13s gains LID switch support. Fairphone FP3 gains touchscreen support. Support for Xiaomi Poco F1 variant with EBBG panel. The round-robin ADC is enabled across DB845c, OnePlus devices and Pocophone F1 devices. The displayport controller on SDM845 is introduced. SM6350 gains SDHCI support and on Sony Xperia 10 III sd-card, touchscreen and GPI DMA is enabled. Fairphone FP4 got SD-card support. UFS PHY register ranges are corrected across SM8150, SM8250, SM8350 and SM8450. Sony Xperia 1 II got NFC support and Sony Xperia 5 III got PMIC regulators defined and USB definition corrected, to enable USB3. The SDHCI controller is described for SM8450 and microSD support is enabled for the HDK and QRD devices. SM8450 also gains camera CCI interface and display clock controller. * tag 'qcom-arm64-for-6.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (261 commits) arm64: dts: qcom: sdm845-polaris: Don't duplicate DMA assignment arm64: dts: qcom: sm8350-sagami: Wire up USB regulators and fix USB3 arm64: dts: qcom: sm8350-sagami: Add most RPMh regulators arm64: dts: qcom: sc7280: Make herobrine-audio-rt5682 mic dtsi's match more arm64: dts: qcom: trim addresses to 8 digits arm64: dts: msm8998: unify PCIe clock order withMSM8996 arm64: dts: msm8998: add MSM8998 specific compatible arm64: dts: qcom: sc8280xp-x13s: enable WiFi controller arm64: dts: qcom: sc8280xp-x13s: enable modem arm64: dts: qcom: sc8280xp-x13s: enable NVMe SSD arm64: dts: qcom: sc8280xp-crd: enable WiFi controller arm64: dts: qcom: sc8280xp-crd: enable SDX55 modem arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD arm64: dts: qcom: sc8280xp-crd: rename backlight and misc regulators arm64: dts: qcom: sa8295p-adp: enable PCIe arm64: dts: qcom: sc8280xp/sa8540p: add PCIe2-4 nodes arm64: dts: qcom: add sdm670 and pixel 3a device trees arm64: dts: qcom: sc7280: Add Google Herobrine WIFI SKU dts fragment arm64: dts: qcom: sc7280: Mark all Qualcomm reference boards as LTE arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card ... Link: https://lore.kernel.org/r/20221124100650.1982448-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h90
1 files changed, 43 insertions, 47 deletions
diff --git a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
index 9426f27a1946..09fd169ad18e 100644
--- a/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
+++ b/include/dt-bindings/iio/qcom,spmi-adc7-pm8350.h
@@ -6,62 +6,58 @@
#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
#define _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H
-#ifndef PM8350_SID
-#define PM8350_SID 1
-#endif
-
/* ADC channels for PM8350_ADC for PMIC7 */
-#define PM8350_ADC7_REF_GND (PM8350_SID << 8 | 0x0)
-#define PM8350_ADC7_1P25VREF (PM8350_SID << 8 | 0x01)
-#define PM8350_ADC7_VREF_VADC (PM8350_SID << 8 | 0x02)
-#define PM8350_ADC7_DIE_TEMP (PM8350_SID << 8 | 0x03)
-
-#define PM8350_ADC7_AMUX_THM1 (PM8350_SID << 8 | 0x04)
-#define PM8350_ADC7_AMUX_THM2 (PM8350_SID << 8 | 0x05)
-#define PM8350_ADC7_AMUX_THM3 (PM8350_SID << 8 | 0x06)
-#define PM8350_ADC7_AMUX_THM4 (PM8350_SID << 8 | 0x07)
-#define PM8350_ADC7_AMUX_THM5 (PM8350_SID << 8 | 0x08)
-#define PM8350_ADC7_GPIO1 (PM8350_SID << 8 | 0x0a)
-#define PM8350_ADC7_GPIO2 (PM8350_SID << 8 | 0x0b)
-#define PM8350_ADC7_GPIO3 (PM8350_SID << 8 | 0x0c)
-#define PM8350_ADC7_GPIO4 (PM8350_SID << 8 | 0x0d)
+#define PM8350_ADC7_REF_GND(sid) ((sid) << 8 | 0x0)
+#define PM8350_ADC7_1P25VREF(sid) ((sid) << 8 | 0x01)
+#define PM8350_ADC7_VREF_VADC(sid) ((sid) << 8 | 0x02)
+#define PM8350_ADC7_DIE_TEMP(sid) ((sid) << 8 | 0x03)
+
+#define PM8350_ADC7_AMUX_THM1(sid) ((sid) << 8 | 0x04)
+#define PM8350_ADC7_AMUX_THM2(sid) ((sid) << 8 | 0x05)
+#define PM8350_ADC7_AMUX_THM3(sid) ((sid) << 8 | 0x06)
+#define PM8350_ADC7_AMUX_THM4(sid) ((sid) << 8 | 0x07)
+#define PM8350_ADC7_AMUX_THM5(sid) ((sid) << 8 | 0x08)
+#define PM8350_ADC7_GPIO1(sid) ((sid) << 8 | 0x0a)
+#define PM8350_ADC7_GPIO2(sid) ((sid) << 8 | 0x0b)
+#define PM8350_ADC7_GPIO3(sid) ((sid) << 8 | 0x0c)
+#define PM8350_ADC7_GPIO4(sid) ((sid) << 8 | 0x0d)
/* 30k pull-up1 */
-#define PM8350_ADC7_AMUX_THM1_30K_PU (PM8350_SID << 8 | 0x24)
-#define PM8350_ADC7_AMUX_THM2_30K_PU (PM8350_SID << 8 | 0x25)
-#define PM8350_ADC7_AMUX_THM3_30K_PU (PM8350_SID << 8 | 0x26)
-#define PM8350_ADC7_AMUX_THM4_30K_PU (PM8350_SID << 8 | 0x27)
-#define PM8350_ADC7_AMUX_THM5_30K_PU (PM8350_SID << 8 | 0x28)
-#define PM8350_ADC7_GPIO1_30K_PU (PM8350_SID << 8 | 0x2a)
-#define PM8350_ADC7_GPIO2_30K_PU (PM8350_SID << 8 | 0x2b)
-#define PM8350_ADC7_GPIO3_30K_PU (PM8350_SID << 8 | 0x2c)
-#define PM8350_ADC7_GPIO4_30K_PU (PM8350_SID << 8 | 0x2d)
+#define PM8350_ADC7_AMUX_THM1_30K_PU(sid) ((sid) << 8 | 0x24)
+#define PM8350_ADC7_AMUX_THM2_30K_PU(sid) ((sid) << 8 | 0x25)
+#define PM8350_ADC7_AMUX_THM3_30K_PU(sid) ((sid) << 8 | 0x26)
+#define PM8350_ADC7_AMUX_THM4_30K_PU(sid) ((sid) << 8 | 0x27)
+#define PM8350_ADC7_AMUX_THM5_30K_PU(sid) ((sid) << 8 | 0x28)
+#define PM8350_ADC7_GPIO1_30K_PU(sid) ((sid) << 8 | 0x2a)
+#define PM8350_ADC7_GPIO2_30K_PU(sid) ((sid) << 8 | 0x2b)
+#define PM8350_ADC7_GPIO3_30K_PU(sid) ((sid) << 8 | 0x2c)
+#define PM8350_ADC7_GPIO4_30K_PU(sid) ((sid) << 8 | 0x2d)
/* 100k pull-up2 */
-#define PM8350_ADC7_AMUX_THM1_100K_PU (PM8350_SID << 8 | 0x44)
-#define PM8350_ADC7_AMUX_THM2_100K_PU (PM8350_SID << 8 | 0x45)
-#define PM8350_ADC7_AMUX_THM3_100K_PU (PM8350_SID << 8 | 0x46)
-#define PM8350_ADC7_AMUX_THM4_100K_PU (PM8350_SID << 8 | 0x47)
-#define PM8350_ADC7_AMUX_THM5_100K_PU (PM8350_SID << 8 | 0x48)
-#define PM8350_ADC7_GPIO1_100K_PU (PM8350_SID << 8 | 0x4a)
-#define PM8350_ADC7_GPIO2_100K_PU (PM8350_SID << 8 | 0x4b)
-#define PM8350_ADC7_GPIO3_100K_PU (PM8350_SID << 8 | 0x4c)
-#define PM8350_ADC7_GPIO4_100K_PU (PM8350_SID << 8 | 0x4d)
+#define PM8350_ADC7_AMUX_THM1_100K_PU(sid) ((sid) << 8 | 0x44)
+#define PM8350_ADC7_AMUX_THM2_100K_PU(sid) ((sid) << 8 | 0x45)
+#define PM8350_ADC7_AMUX_THM3_100K_PU(sid) ((sid) << 8 | 0x46)
+#define PM8350_ADC7_AMUX_THM4_100K_PU(sid) ((sid) << 8 | 0x47)
+#define PM8350_ADC7_AMUX_THM5_100K_PU(sid) ((sid) << 8 | 0x48)
+#define PM8350_ADC7_GPIO1_100K_PU(sid) ((sid) << 8 | 0x4a)
+#define PM8350_ADC7_GPIO2_100K_PU(sid) ((sid) << 8 | 0x4b)
+#define PM8350_ADC7_GPIO3_100K_PU(sid) ((sid) << 8 | 0x4c)
+#define PM8350_ADC7_GPIO4_100K_PU(sid) ((sid) << 8 | 0x4d)
/* 400k pull-up3 */
-#define PM8350_ADC7_AMUX_THM1_400K_PU (PM8350_SID << 8 | 0x64)
-#define PM8350_ADC7_AMUX_THM2_400K_PU (PM8350_SID << 8 | 0x65)
-#define PM8350_ADC7_AMUX_THM3_400K_PU (PM8350_SID << 8 | 0x66)
-#define PM8350_ADC7_AMUX_THM4_400K_PU (PM8350_SID << 8 | 0x67)
-#define PM8350_ADC7_AMUX_THM5_400K_PU (PM8350_SID << 8 | 0x68)
-#define PM8350_ADC7_GPIO1_400K_PU (PM8350_SID << 8 | 0x6a)
-#define PM8350_ADC7_GPIO2_400K_PU (PM8350_SID << 8 | 0x6b)
-#define PM8350_ADC7_GPIO3_400K_PU (PM8350_SID << 8 | 0x6c)
-#define PM8350_ADC7_GPIO4_400K_PU (PM8350_SID << 8 | 0x6d)
+#define PM8350_ADC7_AMUX_THM1_400K_PU(sid) ((sid) << 8 | 0x64)
+#define PM8350_ADC7_AMUX_THM2_400K_PU(sid) ((sid) << 8 | 0x65)
+#define PM8350_ADC7_AMUX_THM3_400K_PU(sid) ((sid) << 8 | 0x66)
+#define PM8350_ADC7_AMUX_THM4_400K_PU(sid) ((sid) << 8 | 0x67)
+#define PM8350_ADC7_AMUX_THM5_400K_PU(sid) ((sid) << 8 | 0x68)
+#define PM8350_ADC7_GPIO1_400K_PU(sid) ((sid) << 8 | 0x6a)
+#define PM8350_ADC7_GPIO2_400K_PU(sid) ((sid) << 8 | 0x6b)
+#define PM8350_ADC7_GPIO3_400K_PU(sid) ((sid) << 8 | 0x6c)
+#define PM8350_ADC7_GPIO4_400K_PU(sid) ((sid) << 8 | 0x6d)
/* 1/3 Divider */
-#define PM8350_ADC7_GPIO4_DIV3 (PM8350_SID << 8 | 0x8d)
+#define PM8350_ADC7_GPIO4_DIV3(sid) ((sid) << 8 | 0x8d)
-#define PM8350_ADC7_VPH_PWR (PM8350_SID << 8 | 0x8e)
+#define PM8350_ADC7_VPH_PWR(sid) ((sid) << 8 | 0x8e)
#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PM8350_H */