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authorDavid S. Miller <davem@davemloft.net>2022-09-05 10:16:53 +0100
committerDavid S. Miller <davem@davemloft.net>2022-09-05 10:16:53 +0100
commit7752422f500a290c607795ab8db16754b8fd1d4c (patch)
tree566380cce9c6fe7c68afcab001fe77482e028f7a /drivers/net/ethernet/altera/Kconfig
parent9837ec955b46b62d1dd2d00311461a950c50a791 (diff)
parent565f02fc1e5dc18a577545aaef3c1191cd011849 (diff)
downloadlinux-7752422f500a290c607795ab8db16754b8fd1d4c.tar.bz2
Merge branch 'altera-tse-phylink'
Maxime Chevallier says: ==================== net: altera: tse: phylink conversion This is V4 of a series converting the Altera TSE driver to phylink, introducing a new PCS driver along the way. The Altera TSE can be built with a SGMII/1000BaseX PCS, allowing to use SFP ports with this MAC, which is the end goal of adding phylink support and a proper PCS driver. The PCS itself can either be mapped in the MAC's register space, in that case, it's accessed through 32 bits registers, with the higher 16 bits always 0. Alternatively, it can sit on its own register space, exposing 16 bits registers, some of which ressemble the standard PHY registers. To tackle that rework, several things needs updating, starting by the DT binding, since we add support for a new register range for the PCS. Hence, the first patch of the series is a conversion to YAML of the existing binding. Then, patch 2 does a bit of simple cleanup to the TSE driver, using nice reverse xmas tree definitions. Patch 3 adds the actual PCS driver, as a standalone driver. Some future series will then reuse that PCS driver from the dwmac-socfpga driver, which implements support for this exact PCS too, allowing to share the code nicely. Patch 4 is then a phylink conversion of the altera_tse driver, to use this new PCS driver. Finally, patch 5 updates the newly converted DT binding to support the pcs register range. This series contains bits and pieces for this conversion, please tell me if you want me to send it as individual patches. V4 Changes: - Add missing MODULE_* macros to the TSE PCS driver V3 Changes: - YAML binding conversion changes and PCS addition changes thanks to Krzysztof's reviews V2 Changes : - Fixed the binding after the YAML conversion - Added a pcs_validate() callback - Introduced a comment to justify a soft reset for the PCS ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/altera/Kconfig')
-rw-r--r--drivers/net/ethernet/altera/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/altera/Kconfig b/drivers/net/ethernet/altera/Kconfig
index 914e56b91467..dd7fd41ccde5 100644
--- a/drivers/net/ethernet/altera/Kconfig
+++ b/drivers/net/ethernet/altera/Kconfig
@@ -3,6 +3,8 @@ config ALTERA_TSE
tristate "Altera Triple-Speed Ethernet MAC support"
depends on HAS_DMA
select PHYLIB
+ select PHYLINK
+ select PCS_ALTERA_TSE
help
This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.