diff options
| author | Martin Leung <Martin.Leung@amd.com> | 2022-05-13 17:40:42 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-07-05 16:10:45 -0400 |
| commit | 90f33674a0756a6f0907b8f6350cec3f7be4032c (patch) | |
| tree | 84c94aa2702e43a0f9d706e50b6798cda26b7ac1 /drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h | |
| parent | 85f4bc0c333ceed24cbc9f69a2a77fab1ae3d4d1 (diff) | |
| download | linux-90f33674a0756a6f0907b8f6350cec3f7be4032c.tar.bz2 | |
drm/amd/display: Prepare for new interfaces
[WHY]:
Lut pipeline will be hooked up differently in some asics
need to add new interfaces and missing registers.
[HOW]:
Add missing registers and hook up programming from DPP for pre-blend
lut.
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Martin Leung <Martin.Leung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h index 170cf4ae03b6..494cb3a47435 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.h @@ -47,6 +47,13 @@ void dcn32_cab_for_ss_control(struct dc *dc, bool enable); void dcn32_commit_subvp_config(struct dc *dc, struct dc_state *context); +bool dcn32_set_mcm_luts(struct pipe_ctx *pipe_ctx, + const struct dc_plane_state *plane_state); + +bool dcn32_set_input_transfer_func(struct dc *dc, + struct pipe_ctx *pipe_ctx, + const struct dc_plane_state *plane_state); + bool dcn32_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, const struct dc_stream_state *stream); |