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authorLinus Torvalds <torvalds@linux-foundation.org>2021-07-10 09:33:54 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2021-07-10 09:33:54 -0700
commite083bbd6040f4efa5c13633fb4e460b919d69dae (patch)
treeeaaee1c0852e48f29f7cc162313f0ad38ee4a57b /arch/arm/boot/dts/sun8i-r40.dtsi
parent6e207b882159ed3e35a4cd4ff0fc155cce5e3cbc (diff)
parentb62b189f7e2cfd1089b37be57b2e6672d5c3ae14 (diff)
downloadlinux-e083bbd6040f4efa5c13633fb4e460b919d69dae.tar.bz2
Merge tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Olof Johansson: "Like always, the DT branch is sizable. There are numerous additions and fixes to existing platforms, but also a handful of new ones introduced. Less than some other releases, but there's been significant work on cleanups, refactorings and device enabling on existing platforms. A non-exhaustive list of new material: - Refactoring of BCM2711 dtsi structure to add support for the Raspberry Pi 400 - Rockchip: RK3568 SoC and EVB, video codecs for rk3036/3066/3188/322x - Qualcomm: SA8155p Automotive platform (SM8150 derivative), SM8150/8250 enhancements and support for Sony Xperia 1/1II and 5/5II - TI K3: PCI/USB3 support on AM64-sk boards, R5 remoteproc definitions - TI OMAP: Various cleanups - Tegra: Audio support for Jetson Xavier NX, SMMU support on Tegra194 - Qualcomm: lots of additions for peripherals across several SoCs, and new support for Microsoft Surface Duo (SM8150-based), Huawei Ascend G7. - i.MX: Numerous additions of features across SoCs and boards. - Allwinner: More device bindings for V3s, Forlinx OKA40i-C and NanoPi R1S H5 boards - MediaTek: More device bindings for mt8167, new Chromebook system variants for mt8183 - Renesas: RZ/G2L SoC and EVK added - Amlogic: BananaPi BPI-M5 board added" * tag 'arm-dt-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (511 commits) arm64: dts: rockchip: add basic dts for RK3568 EVB arm64: dts: rockchip: add core dtsi for RK3568 SoC arm64: dts: rockchip: add generic pinconfig settings used by most Rockchip socs ARM: dts: rockchip: add vpu and vdec node for RK322x ARM: dts: rockchip: add vpu nodes for RK3066 and RK3188 ARM: dts: rockchip: add vpu node for RK3036 arm64: dts: ipq8074: Add QUP6 I2C node arm64: dts: rockchip: Re-add regulator-always-on for vcc_sdio for rk3399-roc-pc arm64: dts: rockchip: Re-add regulator-boot-on, regulator-always-on for vdd_gpu on rk3399-roc-pc arm64: dts: rockchip: add ir-receiver for rk3399-roc-pc arm64: dts: rockchip: Add USB-C port details for rk3399 Firefly arm64: dts: rockchip: Sort rk3399 firefly pinmux entries arm64: dts: rockchip: add infrared receiver node to RK3399 Firefly arm64: dts: rockchip: add SPDIF node for rk3399-firefly arm64: dts: rockchip: Add Rotation Property for OGA Panel arm64: dts: qcom: sc7180: bus votes for eMMC and SD card arm64: dts: qcom: sm8250-edo: Add Samsung touchscreen arm64: dts: qcom: sm8250-edo: Enable GPI DMA arm64: dts: qcom: sm8250-edo: Enable ADSP/CDSP/SLPI arm64: dts: qcom: sm8250-edo: Enable PCIe ...
Diffstat (limited to 'arch/arm/boot/dts/sun8i-r40.dtsi')
-rw-r--r--arch/arm/boot/dts/sun8i-r40.dtsi56
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index d5ad3b9efd12..291f4784e86c 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -357,6 +357,8 @@
clock-names = "ahb", "mmc";
resets = <&ccu RST_BUS_MMC3>;
reset-names = "ahb";
+ pinctrl-0 = <&mmc3_pins>;
+ pinctrl-names = "default";
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
#address-cells = <1>;
@@ -602,6 +604,15 @@
};
/omit-if-no-ref/
+ mmc3_pins: mmc3-pins {
+ pins = "PI4", "PI5", "PI6",
+ "PI7", "PI8", "PI9";
+ function = "mmc3";
+ drive-strength = <30>;
+ bias-pull-up;
+ };
+
+ /omit-if-no-ref/
spi0_pc_pins: spi0-pc-pins {
pins = "PC0", "PC1", "PC2";
function = "spi0";
@@ -631,20 +642,65 @@
function = "spi1";
};
+ /omit-if-no-ref/
uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
};
+ /omit-if-no-ref/
+ uart2_pi_pins: uart2-pi-pins {
+ pins = "PI18", "PI19";
+ function = "uart2";
+ };
+
+ /omit-if-no-ref/
+ uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
+ pins = "PI16", "PI17";
+ function = "uart2";
+ };
+
+ /omit-if-no-ref/
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
};
+ /omit-if-no-ref/
uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
pins = "PG8", "PG9";
function = "uart3";
};
+
+ /omit-if-no-ref/
+ uart4_pg_pins: uart4-pg-pins {
+ pins = "PG10", "PG11";
+ function = "uart4";
+ };
+
+ /omit-if-no-ref/
+ uart5_ph_pins: uart5-ph-pins {
+ pins = "PH6", "PH7";
+ function = "uart5";
+ };
+
+ /omit-if-no-ref/
+ uart7_pi_pins: uart7-pi-pins {
+ pins = "PI20", "PI21";
+ function = "uart7";
+ };
+ };
+
+ timer@1c20c00 {
+ compatible = "allwinner,sun4i-a10-timer";
+ reg = <0x01c20c00 0x90>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>;
};
wdt: watchdog@1c20c90 {