From fd5ef505453f995b4ce6ef6e43ddc15967a94a96 Mon Sep 17 00:00:00 2001 From: Ivan Uvarov Date: Wed, 7 Apr 2021 14:14:24 +0300 Subject: ARM: dts: sun8i: r40: add /omit-if-no-ref/ to pinmux nodes for UARTs 0&3 This patch adds the /omit-if-no-ref/ keyword to the pio nodes for UART0 and UART3 pins of the R40 SoC, which would reduce the fdt size on boards which do not use these UARTs. Signed-off-by: Ivan Uvarov 1 file changed, 3 insertions(+) Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20210407111428.3755684-2-i.uvarov@cognitivepilot.com --- arch/arm/boot/dts/sun8i-r40.dtsi | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/boot/dts/sun8i-r40.dtsi') diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index d5ad3b9efd12..0b257a07792f 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -631,16 +631,19 @@ function = "spi1"; }; + /omit-if-no-ref/ uart0_pb_pins: uart0-pb-pins { pins = "PB22", "PB23"; function = "uart0"; }; + /omit-if-no-ref/ uart3_pg_pins: uart3-pg-pins { pins = "PG6", "PG7"; function = "uart3"; }; + /omit-if-no-ref/ uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins { pins = "PG8", "PG9"; function = "uart3"; -- cgit v1.2.3 From 492dd7309aed4d2313a6f9d9a26f88707f51161b Mon Sep 17 00:00:00 2001 From: Ivan Uvarov Date: Wed, 7 Apr 2021 14:14:25 +0300 Subject: ARM: dts: sun8i: r40: add pinmux settings for MMC3 and UARTs 2, 4, 5&7 The Forlinx OKA40i-C devboard makes use of UARTs 0,2,3,4,5 and 7 of the R40 SoC, of which UART 0 is connected to an RS232 converter, UART 5 routed to an RS485 converter, and the rest broken out directly via labeled headers. The board also contains a micro-SD slot connected to SDC3. This patch adds settings to R40's pinmux node for MMC3 and those UARTs that were not already mapped, which would allow us to make use of all available UARTs and the micro-SD slot on this board in a further patch. Reviewed-by: Andre Przywara Signed-off-by: Ivan Uvarov 1 file changed, 41 insertions(+) Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20210407111428.3755684-3-i.uvarov@cognitivepilot.com --- arch/arm/boot/dts/sun8i-r40.dtsi | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'arch/arm/boot/dts/sun8i-r40.dtsi') diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 0b257a07792f..03e054c0bac4 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -357,6 +357,8 @@ clock-names = "ahb", "mmc"; resets = <&ccu RST_BUS_MMC3>; reset-names = "ahb"; + pinctrl-0 = <&mmc3_pins>; + pinctrl-names = "default"; interrupts = ; status = "disabled"; #address-cells = <1>; @@ -601,6 +603,15 @@ bias-pull-up; }; + /omit-if-no-ref/ + mmc3_pins: mmc3-pins { + pins = "PI4", "PI5", "PI6", + "PI7", "PI8", "PI9"; + function = "mmc3"; + drive-strength = <30>; + bias-pull-up; + }; + /omit-if-no-ref/ spi0_pc_pins: spi0-pc-pins { pins = "PC0", "PC1", "PC2"; @@ -637,6 +648,18 @@ function = "uart0"; }; + /omit-if-no-ref/ + uart2_pi_pins: uart2-pi-pins { + pins = "PI18", "PI19"; + function = "uart2"; + }; + + /omit-if-no-ref/ + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ + pins = "PI16", "PI17"; + function = "uart2"; + }; + /omit-if-no-ref/ uart3_pg_pins: uart3-pg-pins { pins = "PG6", "PG7"; @@ -648,6 +671,24 @@ pins = "PG8", "PG9"; function = "uart3"; }; + + /omit-if-no-ref/ + uart4_pg_pins: uart4-pg-pins { + pins = "PG10", "PG11"; + function = "uart4"; + }; + + /omit-if-no-ref/ + uart5_ph_pins: uart5-ph-pins { + pins = "PH6", "PH7"; + function = "uart5"; + }; + + /omit-if-no-ref/ + uart7_pi_pins: uart7-pi-pins { + pins = "PI20", "PI21"; + function = "uart7"; + }; }; wdt: watchdog@1c20c90 { -- cgit v1.2.3 From 086a4302380931ca627b51b4ef5ba3bfeca21276 Mon Sep 17 00:00:00 2001 From: Jernej Skrabec Date: Mon, 10 May 2021 18:36:47 +0200 Subject: ARM: dts: sun8i: r40: Add timer node Allwinner R40 has a timer. Add a node for it. Signed-off-by: Jernej Skrabec Signed-off-by: Maxime Ripard Link: https://lore.kernel.org/r/20210510163647.2731675-1-jernej.skrabec@gmail.com --- arch/arm/boot/dts/sun8i-r40.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/boot/dts/sun8i-r40.dtsi') diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 03e054c0bac4..291f4784e86c 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -691,6 +691,18 @@ }; }; + timer@1c20c00 { + compatible = "allwinner,sun4i-a10-timer"; + reg = <0x01c20c00 0x90>; + interrupts = , + , + , + , + , + ; + clocks = <&osc24M>; + }; + wdt: watchdog@1c20c90 { compatible = "allwinner,sun4i-a10-wdt"; reg = <0x01c20c90 0x10>; -- cgit v1.2.3