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| author | Adam Buchbinder <adam.buchbinder@gmail.com> | 2016-02-23 15:24:55 -0800 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2016-03-11 14:59:53 +0530 |
| commit | 7423cc0caee7a42735ee2908f24ec69957c9bc85 (patch) | |
| tree | 7c93b6feff3331233bafd7236d8ab95e13eadfef /arch/arc/include/asm/pgtable.h | |
| parent | fc77dbd34c5c99bce46d40a2491937c3bcbd10af (diff) | |
| download | linux-7423cc0caee7a42735ee2908f24ec69957c9bc85.tar.bz2 | |
ARC: Fix misspellings in comments.
Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/pgtable.h')
| -rw-r--r-- | arch/arc/include/asm/pgtable.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/include/asm/pgtable.h b/arch/arc/include/asm/pgtable.h index d426d4215513..ec2af62f5348 100644 --- a/arch/arc/include/asm/pgtable.h +++ b/arch/arc/include/asm/pgtable.h @@ -12,7 +12,7 @@ * - Utilise some unused free bits to confine PTE flags to 12 bits * This is a must for 4k pg-sz * - * vineetg: Mar 2011 - changes to accomodate MMU TLB Page Descriptor mods + * vineetg: Mar 2011 - changes to accommodate MMU TLB Page Descriptor mods * -TLB Locking never really existed, except for initial specs * -SILENT_xxx not needed for our port * -Per my request, MMU V3 changes the layout of some of the bits |