blob: 1c7e2127c758451f9a8baab6a51070b6605812b3 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
* Copyright 2021 NXP
*/
#ifndef _IMX_RPROC_H
#define _IMX_RPROC_H
/* address translation table */
struct imx_rproc_att {
u32 da; /* device address (From Cortex M4 view)*/
u32 sa; /* system bus address */
u32 size; /* size of reg range */
int flags;
};
/* Remote core start/stop method */
enum imx_rproc_method {
IMX_RPROC_NONE,
/* Through syscon regmap */
IMX_RPROC_MMIO,
/* Through ARM SMCCC */
IMX_RPROC_SMC,
/* Through System Control Unit API */
IMX_RPROC_SCU_API,
};
struct imx_rproc_dcfg {
u32 src_reg;
u32 src_mask;
u32 src_start;
u32 src_stop;
const struct imx_rproc_att *att;
size_t att_size;
enum imx_rproc_method method;
};
#endif /* _IMX_RPROC_H */
|