summaryrefslogtreecommitdiffstats
path: root/drivers/net/irda/sh_irda.c
blob: eb315b8d07a3c448822dabe8a0df5dfae3dcc13f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
/*
 * SuperH IrDA Driver
 *
 * Copyright (C) 2010 Renesas Solutions Corp.
 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
 *
 * Based on sh_sir.c
 * Copyright (C) 2009 Renesas Solutions Corp.
 * Copyright 2006-2009 Analog Devices Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/*
 * CAUTION
 *
 * This driver is very simple.
 * So, it doesn't have below support now
 *  - MIR/FIR support
 *  - DMA transfer support
 *  - FIFO mode support
 */
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/clk.h>
#include <net/irda/wrapper.h>
#include <net/irda/irda_device.h>

#define DRIVER_NAME "sh_irda"

#if defined(CONFIG_ARCH_SH7367) || defined(CONFIG_ARCH_SH7377)
#define __IRDARAM_LEN	0x13FF
#else
#define __IRDARAM_LEN	0x1039
#endif

#define IRTMR		0x1F00 /* Transfer mode */
#define IRCFR		0x1F02 /* Configuration */
#define IRCTR		0x1F04 /* IR control */
#define IRTFLR		0x1F20 /* Transmit frame length */
#define IRTCTR		0x1F22 /* Transmit control */
#define IRRFLR		0x1F40 /* Receive frame length */
#define IRRCTR		0x1F42 /* Receive control */
#define SIRISR		0x1F60 /* SIR-UART mode interrupt source */
#define SIRIMR		0x1F62 /* SIR-UART mode interrupt mask */
#define SIRICR		0x1F64 /* SIR-UART mode interrupt clear */
#define SIRBCR		0x1F68 /* SIR-UART mode baud rate count */
#define MFIRISR		0x1F70 /* MIR/FIR mode interrupt source */
#define MFIRIMR		0x1F72 /* MIR/FIR mode interrupt mask */
#define MFIRICR		0x1F74 /* MIR/FIR mode interrupt clear */
#define CRCCTR		0x1F80 /* CRC engine control */
#define CRCIR		0x1F86 /* CRC engine input data */
#define CRCCR		0x1F8A /* CRC engine calculation */
#define CRCOR		0x1F8E /* CRC engine output data */
#define FIFOCP		0x1FC0 /* FIFO current pointer */
#define FIFOFP		0x1FC2 /* FIFO follow pointer */
#define FIFORSMSK	0x1FC4 /* FIFO receive status mask */
#define FIFORSOR	0x1FC6 /* FIFO receive status OR */
#define FIFOSEL		0x1FC8 /* FIFO select */
#define FIFORS		0x1FCA /* FIFO receive status */
#define FIFORFL		0x1FCC /* FIFO receive frame length */
#define FIFORAMCP	0x1FCE /* FIFO RAM current pointer */
#define FIFORAMFP	0x1FD0 /* FIFO RAM follow pointer */
#define BIFCTL		0x1FD2 /* BUS interface control */
#define IRDARAM		0x0000 /* IrDA buffer RAM */
#define IRDARAM_LEN	__IRDARAM_LEN /* - 8/16/32 (read-only for 32) */

/* IRTMR */
#define TMD_MASK	(0x3 << 14) /* Transfer Mode */
#define TMD_SIR		(0x0 << 14)
#define TMD_MIR		(0x3 << 14)
#define TMD_FIR		(0x2 << 14)

#define FIFORIM		(1 << 8) /* FIFO receive interrupt mask */
#define MIM		(1 << 4) /* MIR/FIR Interrupt Mask */
#define SIM		(1 << 0) /* SIR Interrupt Mask */
#define xIM_MASK	(FIFORIM | MIM | SIM)

/* IRCFR */
#define RTO_SHIFT	8 /* shift for Receive Timeout */
#define RTO		(0x3 << RTO_SHIFT)

/* IRTCTR */
#define ARMOD		(1 << 15) /* Auto-Receive Mode */
#define TE		(1 <<  0) /* Transmit Enable */

/* IRRFLR */
#define RFL_MASK	(0x1FFF) /* mask for Receive Frame Length */

/* IRRCTR */
#define RE		(1 <<  0) /* Receive Enable */

/*
 * SIRISR,  SIRIMR,  SIRICR,
 * MFIRISR, MFIRIMR, MFIRICR
 */
#define FRE		(1 << 15) /* Frame Receive End */
#define TROV		(1 << 11) /* Transfer Area Overflow */
#define xIR_9		(1 << 9)
#define TOT		xIR_9     /* for SIR     Timeout */
#define ABTD		xIR_9     /* for MIR/FIR Abort Detection */
#define xIR_8		(1 << 8)
#define FER		xIR_8     /* for SIR     Framing Error */
#define CRCER		xIR_8     /* for MIR/FIR CRC error */
#define FTE		(1 << 7)  /* Frame Transmit End */
#define xIR_MASK	(FRE | TROV | xIR_9 | xIR_8 | FTE)

/* SIRBCR */
#define BRC_MASK	(0x3F) /* mask for Baud Rate Count */

/* CRCCTR */
#define CRC_RST		(1 << 15) /* CRC Engine Reset */
#define CRC_CT_MASK	0x0FFF    /* mask for CRC Engine Input Data Count */

/* CRCIR */
#define CRC_IN_MASK	0x0FFF    /* mask for CRC Engine Input Data */

/************************************************************************


			enum / structure


************************************************************************/
enum sh_irda_mode {
	SH_IRDA_NONE = 0,
	SH_IRDA_SIR,
	SH_IRDA_MIR,
	SH_IRDA_FIR,
};

struct sh_irda_self;
struct sh_irda_xir_func {
	int (*xir_fre)	(struct sh_irda_self *self);
	int (*xir_trov)	(struct sh_irda_self *self);
	int (*xir_9)	(struct sh_irda_self *self);
	int (*xir_8)	(struct sh_irda_self *self);
	int (*xir_fte)	(struct sh_irda_self *self);
};

struct sh_irda_self {
	void __iomem		*membase;
	unsigned int		irq;
	struct platform_device	*pdev;

	struct net_device	*ndev;

	struct irlap_cb		*irlap;
	struct qos_info		qos;

	iobuff_t		tx_buff;
	iobuff_t		rx_buff;

	enum sh_irda_mode	mode;
	spinlock_t		lock;

	struct sh_irda_xir_func	*xir_func;
};

/************************************************************************


			common function


************************************************************************/
static void sh_irda_write(struct sh_irda_self *self, u32 offset, u16 data)
{
	unsigned long flags;

	spin_lock_irqsave(&self->lock, flags);
	iowrite16(data, self->membase + offset);
	spin_unlock_irqrestore(&self->lock, flags);
}

static u16 sh_irda_read(struct sh_irda_self *self, u32 offset)
{
	unsigned long flags;
	u16 ret;

	spin_lock_irqsave(&self->lock, flags);
	ret = ioread16(self->membase + offset);
	spin_unlock_irqrestore(&self->lock, flags);

	return ret;
}

static void sh_irda_update_bits(struct sh_irda_self *self, u32 offset,
			       u16 mask, u16 data)
{
	unsigned long flags;
	u16 old, new;

	spin_lock_irqsave(&self->lock, flags);
	old = ioread16(self->membase + offset);
	new = (old & ~mask) | data;
	if (old != new)
		iowrite16(data, self->membase + offset);
	spin_unlock_irqrestore(&self->lock, flags);
}

/************************************************************************


			mode function


************************************************************************/
/*=====================================
 *
 *		common
 *
 *=====================================*/
static void sh_irda_rcv_ctrl(struct sh_irda_self *self, int enable)
{
	struct device *dev = &self->ndev->dev;

	sh_irda_update_bits(self, IRRCTR, RE, enable ? RE : 0);
	dev_dbg(dev, "recv %s\n", enable ? "enable" : "disable");
}

static int sh_irda_set_timeout(struct sh_irda_self *self, int interval)
{
	struct device *dev = &self->ndev->dev;

	if (SH_IRDA_SIR != self->mode)
		interval = 0;

	if (interval < 0 || interval > 2) {
		dev_err(dev, "unsupported timeout interval\n");
		return -EINVAL;
	}

	sh_irda_update_bits(self, IRCFR, RTO, interval << RTO_SHIFT);
	return 0;
}

static int sh_irda_set_baudrate(struct sh_irda_self *self, int baudrate)
{
	struct device *dev = &self->ndev->dev;
	u16 val;

	if (baudrate < 0)
		return 0;

	if (SH_IRDA_SIR != self->mode) {
		dev_err(dev, "it is not SIR mode\n");
		return -EINVAL;
	}

	/*
	 * Baud rate (bits/s) =
	 *   (48 MHz / 26) / (baud rate counter value + 1) x 16
	 */
	val = (48000000 / 26 / 16 / baudrate) - 1;
	dev_dbg(dev, "baudrate = %d,  val = 0x%02x\n", baudrate, val);

	sh_irda_update_bits(self, SIRBCR, BRC_MASK, val);

	return 0;
}

static int sh_irda_get_rcv_length(struct sh_irda_self *self)
{
	return RFL_MASK & sh_irda_read(self, IRRFLR);
}

/*=====================================
 *
 *		NONE MODE
 *
 *=====================================*/
static int sh_irda_xir_fre(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	dev_err(dev, "none mode: frame recv\n");
	return 0;
}

static int sh_irda_xir_trov(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	dev_err(dev, "none mode: buffer ram over\n");
	return 0;
}

static int sh_irda_xir_9(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	dev_err(dev, "none mode: time over\n");
	return 0;
}

static int sh_irda_xir_8(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	dev_err(dev, "none mode: framing error\n");
	return 0;
}

static int sh_irda_xir_fte(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	dev_err(dev, "none mode: frame transmit end\n");
	return 0;
}

static struct sh_irda_xir_func sh_irda_xir_func = {
	.xir_fre	= sh_irda_xir_fre,
	.xir_trov	= sh_irda_xir_trov,
	.xir_9		= sh_irda_xir_9,
	.xir_8		= sh_irda_xir_8,
	.xir_fte	= sh_irda_xir_fte,
};

/*=====================================
 *
 *		MIR/FIR MODE
 *
 * MIR/FIR are not supported now
 *=====================================*/
static struct sh_irda_xir_func sh_irda_mfir_func = {
	.xir_fre	= sh_irda_xir_fre,
	.xir_trov	= sh_irda_xir_trov,
	.xir_9		= sh_irda_xir_9,
	.xir_8		= sh_irda_xir_8,
	.xir_fte	= sh_irda_xir_fte,
};

/*=====================================
 *
 *		SIR MODE
 *
 *=====================================*/
static int sh_irda_sir_fre(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	u16 data16;
	u8  *data = (u8 *)&data16;
	int len = sh_irda_get_rcv_length(self);
	int i, j;

	if (len > IRDARAM_LEN)
		len = IRDARAM_LEN;

	dev_dbg(dev, "frame recv length = %d\n", len);

	for (i = 0; i < len; i++) {
		j = i % 2;
		if (!j)
			data16 = sh_irda_read(self, IRDARAM + i);

		async_unwrap_char(self->ndev, &self->ndev->stats,
				  &self->rx_buff, data[j]);
	}
	self->ndev->last_rx = jiffies;

	sh_irda_rcv_ctrl(self, 1);

	return 0;
}

static int sh_irda_sir_trov(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;

	dev_err(dev, "buffer ram over\n");
	sh_irda_rcv_ctrl(self, 1);
	return 0;
}

static int sh_irda_sir_tot(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;

	dev_err(dev, "time over\n");
	sh_irda_set_baudrate(self, 9600);
	sh_irda_rcv_ctrl(self, 1);
	return 0;
}

static int sh_irda_sir_fer(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;

	dev_err(dev, "framing error\n");
	sh_irda_rcv_ctrl(self, 1);
	return 0;
}

static int sh_irda_sir_fte(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;

	dev_dbg(dev, "frame transmit end\n");
	netif_wake_queue(self->ndev);

	return 0;
}

static struct sh_irda_xir_func sh_irda_sir_func = {
	.xir_fre	= sh_irda_sir_fre,
	.xir_trov	= sh_irda_sir_trov,
	.xir_9		= sh_irda_sir_tot,
	.xir_8		= sh_irda_sir_fer,
	.xir_fte	= sh_irda_sir_fte,
};

static void sh_irda_set_mode(struct sh_irda_self *self, enum sh_irda_mode mode)
{
	struct device *dev = &self->ndev->dev;
	struct sh_irda_xir_func	*func;
	const char *name;
	u16 data;

	switch (mode) {
	case SH_IRDA_SIR:
		name	= "SIR";
		data	= TMD_SIR;
		func	= &sh_irda_sir_func;
		break;
	case SH_IRDA_MIR:
		name	= "MIR";
		data	= TMD_MIR;
		func	= &sh_irda_mfir_func;
		break;
	case SH_IRDA_FIR:
		name	= "FIR";
		data	= TMD_FIR;
		func	= &sh_irda_mfir_func;
		break;
	default:
		name	= "NONE";
		data	= 0;
		func	= &sh_irda_xir_func;
		break;
	}

	self->mode = mode;
	self->xir_func = func;
	sh_irda_update_bits(self, IRTMR, TMD_MASK, data);

	dev_dbg(dev, "switch to %s mode", name);
}

/************************************************************************


			irq function


************************************************************************/
static void sh_irda_set_irq_mask(struct sh_irda_self *self)
{
	u16 tmr_hole;
	u16 xir_reg;

	/* set all mask */
	sh_irda_update_bits(self, IRTMR,   xIM_MASK, xIM_MASK);
	sh_irda_update_bits(self, SIRIMR,  xIR_MASK, xIR_MASK);
	sh_irda_update_bits(self, MFIRIMR, xIR_MASK, xIR_MASK);

	/* clear irq */
	sh_irda_update_bits(self, SIRICR,  xIR_MASK, xIR_MASK);
	sh_irda_update_bits(self, MFIRICR, xIR_MASK, xIR_MASK);

	switch (self->mode) {
	case SH_IRDA_SIR:
		tmr_hole	= SIM;
		xir_reg		= SIRIMR;
		break;
	case SH_IRDA_MIR:
	case SH_IRDA_FIR:
		tmr_hole	= MIM;
		xir_reg		= MFIRIMR;
		break;
	default:
		tmr_hole	= 0;
		xir_reg		= 0;
		break;
	}

	/* open mask */
	if (xir_reg) {
		sh_irda_update_bits(self, IRTMR, tmr_hole, 0);
		sh_irda_update_bits(self, xir_reg, xIR_MASK, 0);
	}
}

static irqreturn_t sh_irda_irq(int irq, void *dev_id)
{
	struct sh_irda_self *self = dev_id;
	struct sh_irda_xir_func	*func = self->xir_func;
	u16 isr = sh_irda_read(self, SIRISR);

	/* clear irq */
	sh_irda_write(self, SIRICR, isr);

	if (isr & FRE)
		func->xir_fre(self);
	if (isr & TROV)
		func->xir_trov(self);
	if (isr & xIR_9)
		func->xir_9(self);
	if (isr & xIR_8)
		func->xir_8(self);
	if (isr & FTE)
		func->xir_fte(self);

	return IRQ_HANDLED;
}

/************************************************************************


			CRC function


************************************************************************/
static void sh_irda_crc_reset(struct sh_irda_self *self)
{
	sh_irda_write(self, CRCCTR, CRC_RST);
}

static void sh_irda_crc_add(struct sh_irda_self *self, u16 data)
{
	sh_irda_write(self, CRCIR, data & CRC_IN_MASK);
}

static u16 sh_irda_crc_cnt(struct sh_irda_self *self)
{
	return CRC_CT_MASK & sh_irda_read(self, CRCCTR);
}

static u16 sh_irda_crc_out(struct sh_irda_self *self)
{
	return sh_irda_read(self, CRCOR);
}

static int sh_irda_crc_init(struct sh_irda_self *self)
{
	struct device *dev = &self->ndev->dev;
	int ret = -EIO;
	u16 val;

	sh_irda_crc_reset(self);

	sh_irda_crc_add(self, 0xCC);
	sh_irda_crc_add(self, 0xF5);
	sh_irda_crc_add(self, 0xF1);
	sh_irda_crc_add(self, 0xA7);

	val = sh_irda_crc_cnt(self);
	if (4 != val) {
		dev_err(dev, "CRC count error %x\n", val);
		goto crc_init_out;
	}

	val = sh_irda_crc_out(self);
	if (0x51DF != val) {
		dev_err(dev, "CRC result error%x\n", val);
		goto crc_init_out;
	}

	ret = 0;

crc_init_out:

	sh_irda_crc_reset(self);
	return ret;
}

/************************************************************************


			iobuf function


************************************************************************/
static void sh_irda_remove_iobuf(struct sh_irda_self *self)
{
	kfree(self->rx_buff.head);

	self->tx_buff.head = NULL;
	self->tx_buff.data = NULL;
	self->rx_buff.head = NULL;
	self->rx_buff.data = NULL;
}

static int sh_irda_init_iobuf(struct sh_irda_self *self, int rxsize, int txsize)
{
	if (self->rx_buff.head ||
	    self->tx_buff.head) {
		dev_err(&self->ndev->dev, "iobuff has already existed.");
		return -EINVAL;
	}

	/* rx_buff */
	self->rx_buff.head = kmalloc(rxsize, GFP_KERNEL);
	if (!self->rx_buff.head)
		return -ENOMEM;

	self->rx_buff.truesize	= rxsize;
	self->rx_buff.in_frame	= FALSE;
	self->rx_buff.state	= OUTSIDE_FRAME;
	self->rx_buff.data	= self->rx_buff.head;

	/* tx_buff */
	self->tx_buff.head	= self->membase + IRDARAM;
	self->tx_buff.truesize	= IRDARAM_LEN;

	return 0;
}

/************************************************************************


			net_device_ops function


************************************************************************/
static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
{
	struct sh_irda_self *self = netdev_priv(ndev);
	struct device *dev = &self->ndev->dev;
	int speed = irda_get_next_speed(skb);
	int ret;

	dev_dbg(dev, "hard xmit\n");

	netif_stop_queue(ndev);
	sh_irda_rcv_ctrl(self, 0);

	ret = sh_irda_set_baudrate(self, speed);
	if (ret < 0)
		goto sh_irda_hard_xmit_end;

	self->tx_buff.len = 0;
	if (skb->len) {
		unsigned long flags;

		spin_lock_irqsave(&self->lock, flags);
		self->tx_buff.len = async_wrap_skb(skb,
						   self->tx_buff.head,
						   self->tx_buff.truesize);
		spin_unlock_irqrestore(&self->lock, flags);

		if (self->tx_buff.len > self->tx_buff.truesize)
			self->tx_buff.len = self->tx_buff.truesize;

		sh_irda_write(self, IRTFLR, self->tx_buff.len);
		sh_irda_write(self, IRTCTR, ARMOD | TE);
	} else
		goto sh_irda_hard_xmit_end;

	dev_kfree_skb(skb);

	return 0;

sh_irda_hard_xmit_end:
	sh_irda_set_baudrate(self, 9600);
	netif_wake_queue(self->ndev);
	sh_irda_rcv_ctrl(self, 1);
	dev_kfree_skb(skb);

	return ret;

}

static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd)
{
	/*
	 * FIXME
	 *
	 * This function is needed for irda framework.
	 * But nothing to do now
	 */
	return 0;
}

static struct net_device_stats *sh_irda_stats(struct net_device *ndev)
{
	struct sh_irda_self *self = netdev_priv(ndev);

	return &self->ndev->stats;
}

static int sh_irda_open(struct net_device *ndev)
{
	struct sh_irda_self *self = netdev_priv(ndev);
	int err;

	pm_runtime_get_sync(&self->pdev->dev);
	err = sh_irda_crc_init(self);
	if (err)
		goto open_err;

	sh_irda_set_mode(self, SH_IRDA_SIR);
	sh_irda_set_timeout(self, 2);
	sh_irda_set_baudrate(self, 9600);

	self->irlap = irlap_open(ndev, &self->qos, DRIVER_NAME);
	if (!self->irlap) {
		err = -ENODEV;
		goto open_err;
	}

	netif_start_queue(ndev);
	sh_irda_rcv_ctrl(self, 1);
	sh_irda_set_irq_mask(self);

	dev_info(&ndev->dev, "opened\n");

	return 0;

open_err:
	pm_runtime_put_sync(&self->pdev->dev);

	return err;
}

static int sh_irda_stop(struct net_device *ndev)
{
	struct sh_irda_self *self = netdev_priv(ndev);

	/* Stop IrLAP */
	if (self->irlap) {
		irlap_close(self->irlap);
		self->irlap = NULL;
	}

	netif_stop_queue(ndev);
	pm_runtime_put_sync(&self->pdev->dev);

	dev_info(&ndev->dev, "stopped\n");

	return 0;
}

static const struct net_device_ops sh_irda_ndo = {
	.ndo_open		= sh_irda_open,
	.ndo_stop		= sh_irda_stop,
	.ndo_start_xmit		= sh_irda_hard_xmit,
	.ndo_do_ioctl		= sh_irda_ioctl,
	.ndo_get_stats		= sh_irda_stats,
};

/************************************************************************


			platform_driver function


************************************************************************/
static int __devinit sh_irda_probe(struct platform_device *pdev)
{
	struct net_device *ndev;
	struct sh_irda_self *self;
	struct resource *res;
	int irq;
	int err = -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	irq = platform_get_irq(pdev, 0);
	if (!res || irq < 0) {
		dev_err(&pdev->dev, "Not enough platform resources.\n");
		goto exit;
	}

	ndev = alloc_irdadev(sizeof(*self));
	if (!ndev)
		goto exit;

	self = netdev_priv(ndev);
	self->membase = ioremap_nocache(res->start, resource_size(res));
	if (!self->membase) {
		err = -ENXIO;
		dev_err(&pdev->dev, "Unable to ioremap.\n");
		goto err_mem_1;
	}

	err = sh_irda_init_iobuf(self, IRDA_SKB_MAX_MTU, IRDA_SIR_MAX_FRAME);
	if (err)
		goto err_mem_2;

	self->pdev = pdev;
	pm_runtime_enable(&pdev->dev);

	irda_init_max_qos_capabilies(&self->qos);

	ndev->netdev_ops	= &sh_irda_ndo;
	ndev->irq		= irq;

	self->ndev			= ndev;
	self->qos.baud_rate.bits	&= IR_9600; /* FIXME */
	self->qos.min_turn_time.bits	= 1; /* 10 ms or more */
	spin_lock_init(&self->lock);

	irda_qos_bits_to_value(&self->qos);

	err = register_netdev(ndev);
	if (err)
		goto err_mem_4;

	platform_set_drvdata(pdev, ndev);

	if (request_irq(irq, sh_irda_irq, IRQF_DISABLED, "sh_irda", self)) {
		dev_warn(&pdev->dev, "Unable to attach sh_irda interrupt\n");
		goto err_mem_4;
	}

	dev_info(&pdev->dev, "SuperH IrDA probed\n");

	goto exit;

err_mem_4:
	pm_runtime_disable(&pdev->dev);
	sh_irda_remove_iobuf(self);
err_mem_2:
	iounmap(self->membase);
err_mem_1:
	free_netdev(ndev);
exit:
	return err;
}

static int __devexit sh_irda_remove(struct platform_device *pdev)
{
	struct net_device *ndev = platform_get_drvdata(pdev);
	struct sh_irda_self *self = netdev_priv(ndev);

	if (!self)
		return 0;

	unregister_netdev(ndev);
	pm_runtime_disable(&pdev->dev);
	sh_irda_remove_iobuf(self);
	iounmap(self->membase);
	free_netdev(ndev);
	platform_set_drvdata(pdev, NULL);

	return 0;
}

static int sh_irda_runtime_nop(struct device *dev)
{
	/* Runtime PM callback shared between ->runtime_suspend()
	 * and ->runtime_resume(). Simply returns success.
	 *
	 * This driver re-initializes all registers after
	 * pm_runtime_get_sync() anyway so there is no need
	 * to save and restore registers here.
	 */
	return 0;
}

static const struct dev_pm_ops sh_irda_pm_ops = {
	.runtime_suspend	= sh_irda_runtime_nop,
	.runtime_resume		= sh_irda_runtime_nop,
};

static struct platform_driver sh_irda_driver = {
	.probe	= sh_irda_probe,
	.remove	= __devexit_p(sh_irda_remove),
	.driver	= {
		.name	= DRIVER_NAME,
		.pm	= &sh_irda_pm_ops,
	},
};

module_platform_driver(sh_irda_driver);

MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>");
MODULE_DESCRIPTION("SuperH IrDA driver");
MODULE_LICENSE("GPL");