summaryrefslogtreecommitdiffstats
path: root/drivers/iio/gyro/fxas21002c.h
blob: 566d92de267633e6f713fa26f82565e143b75ab4 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Driver for NXP FXAS21002C Gyroscope - Header
 *
 * Copyright (C) 2019 Linaro Ltd.
 */

#ifndef FXAS21002C_H_
#define FXAS21002C_H_

#include <linux/regmap.h>

#define FXAS21002C_REG_STATUS		0x00
#define FXAS21002C_REG_OUT_X_MSB	0x01
#define FXAS21002C_REG_OUT_X_LSB	0x02
#define FXAS21002C_REG_OUT_Y_MSB	0x03
#define FXAS21002C_REG_OUT_Y_LSB	0x04
#define FXAS21002C_REG_OUT_Z_MSB	0x05
#define FXAS21002C_REG_OUT_Z_LSB	0x06
#define FXAS21002C_REG_DR_STATUS	0x07
#define FXAS21002C_REG_F_STATUS		0x08
#define FXAS21002C_REG_F_SETUP		0x09
#define FXAS21002C_REG_F_EVENT		0x0A
#define FXAS21002C_REG_INT_SRC_FLAG	0x0B
#define FXAS21002C_REG_WHO_AM_I		0x0C
#define FXAS21002C_REG_CTRL0		0x0D
#define FXAS21002C_REG_RT_CFG		0x0E
#define FXAS21002C_REG_RT_SRC		0x0F
#define FXAS21002C_REG_RT_THS		0x10
#define FXAS21002C_REG_RT_COUNT		0x11
#define FXAS21002C_REG_TEMP		0x12
#define FXAS21002C_REG_CTRL1		0x13
#define FXAS21002C_REG_CTRL2		0x14
#define FXAS21002C_REG_CTRL3		0x15

enum fxas21002c_fields {
	F_DR_STATUS,
	F_OUT_X_MSB,
	F_OUT_X_LSB,
	F_OUT_Y_MSB,
	F_OUT_Y_LSB,
	F_OUT_Z_MSB,
	F_OUT_Z_LSB,
	/* DR_STATUS */
	F_ZYX_OW, F_Z_OW, F_Y_OW, F_X_OW, F_ZYX_DR, F_Z_DR, F_Y_DR, F_X_DR,
	/* F_STATUS */
	F_OVF, F_WMKF, F_CNT,
	/* F_SETUP */
	F_MODE, F_WMRK,
	/* F_EVENT */
	F_EVENT, FE_TIME,
	/* INT_SOURCE_FLAG */
	F_BOOTEND, F_SRC_FIFO, F_SRC_RT, F_SRC_DRDY,
	/* WHO_AM_I */
	F_WHO_AM_I,
	/* CTRL_REG0 */
	F_BW, F_SPIW, F_SEL, F_HPF_EN, F_FS,
	/* RT_CFG */
	F_ELE, F_ZTEFE, F_YTEFE, F_XTEFE,
	/* RT_SRC */
	F_EA, F_ZRT, F_ZRT_POL, F_YRT, F_YRT_POL, F_XRT, F_XRT_POL,
	/* RT_THS */
	F_DBCNTM, F_THS,
	/* RT_COUNT */
	F_RT_COUNT,
	/* TEMP */
	F_TEMP,
	/* CTRL_REG1 */
	F_RST, F_ST, F_DR, F_ACTIVE, F_READY,
	/* CTRL_REG2 */
	F_INT_CFG_FIFO, F_INT_EN_FIFO, F_INT_CFG_RT, F_INT_EN_RT,
	F_INT_CFG_DRDY, F_INT_EN_DRDY, F_IPOL, F_PP_OD,
	/* CTRL_REG3 */
	F_WRAPTOONE, F_EXTCTRLEN, F_FS_DOUBLE,
	/* MAX FIELDS */
	F_MAX_FIELDS,
};

static const struct reg_field fxas21002c_reg_fields[] = {
	[F_DR_STATUS]		= REG_FIELD(FXAS21002C_REG_STATUS, 0, 7),
	[F_OUT_X_MSB]		= REG_FIELD(FXAS21002C_REG_OUT_X_MSB, 0, 7),
	[F_OUT_X_LSB]		= REG_FIELD(FXAS21002C_REG_OUT_X_LSB, 0, 7),
	[F_OUT_Y_MSB]		= REG_FIELD(FXAS21002C_REG_OUT_Y_MSB, 0, 7),
	[F_OUT_Y_LSB]		= REG_FIELD(FXAS21002C_REG_OUT_Y_LSB, 0, 7),
	[F_OUT_Z_MSB]		= REG_FIELD(FXAS21002C_REG_OUT_Z_MSB, 0, 7),
	[F_OUT_Z_LSB]		= REG_FIELD(FXAS21002C_REG_OUT_Z_LSB, 0, 7),
	[F_ZYX_OW]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 7, 7),
	[F_Z_OW]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 6, 6),
	[F_Y_OW]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 5, 5),
	[F_X_OW]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 4, 4),
	[F_ZYX_DR]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 3, 3),
	[F_Z_DR]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 2, 2),
	[F_Y_DR]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 1, 1),
	[F_X_DR]		= REG_FIELD(FXAS21002C_REG_DR_STATUS, 0, 0),
	[F_OVF]			= REG_FIELD(FXAS21002C_REG_F_STATUS, 7, 7),
	[F_WMKF]		= REG_FIELD(FXAS21002C_REG_F_STATUS, 6, 6),
	[F_CNT]			= REG_FIELD(FXAS21002C_REG_F_STATUS, 0, 5),
	[F_MODE]		= REG_FIELD(FXAS21002C_REG_F_SETUP, 6, 7),
	[F_WMRK]		= REG_FIELD(FXAS21002C_REG_F_SETUP, 0, 5),
	[F_EVENT]		= REG_FIELD(FXAS21002C_REG_F_EVENT, 5, 5),
	[FE_TIME]		= REG_FIELD(FXAS21002C_REG_F_EVENT, 0, 4),
	[F_BOOTEND]		= REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 3, 3),
	[F_SRC_FIFO]		= REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 2, 2),
	[F_SRC_RT]		= REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 1, 1),
	[F_SRC_DRDY]		= REG_FIELD(FXAS21002C_REG_INT_SRC_FLAG, 0, 0),
	[F_WHO_AM_I]		= REG_FIELD(FXAS21002C_REG_WHO_AM_I, 0, 7),
	[F_BW]			= REG_FIELD(FXAS21002C_REG_CTRL0, 6, 7),
	[F_SPIW]		= REG_FIELD(FXAS21002C_REG_CTRL0, 5, 5),
	[F_SEL]			= REG_FIELD(FXAS21002C_REG_CTRL0, 3, 4),
	[F_HPF_EN]		= REG_FIELD(FXAS21002C_REG_CTRL0, 2, 2),
	[F_FS]			= REG_FIELD(FXAS21002C_REG_CTRL0, 0, 1),
	[F_ELE]			= REG_FIELD(FXAS21002C_REG_RT_CFG, 3, 3),
	[F_ZTEFE]		= REG_FIELD(FXAS21002C_REG_RT_CFG, 2, 2),
	[F_YTEFE]		= REG_FIELD(FXAS21002C_REG_RT_CFG, 1, 1),
	[F_XTEFE]		= REG_FIELD(FXAS21002C_REG_RT_CFG, 0, 0),
	[F_EA]			= REG_FIELD(FXAS21002C_REG_RT_SRC, 6, 6),
	[F_ZRT]			= REG_FIELD(FXAS21002C_REG_RT_SRC, 5, 5),
	[F_ZRT_POL]		= REG_FIELD(FXAS21002C_REG_RT_SRC, 4, 4),
	[F_YRT]			= REG_FIELD(FXAS21002C_REG_RT_SRC, 3, 3),
	[F_YRT_POL]		= REG_FIELD(FXAS21002C_REG_RT_SRC, 2, 2),
	[F_XRT]			= REG_FIELD(FXAS21002C_REG_RT_SRC, 1, 1),
	[F_XRT_POL]		= REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 0),
	[F_DBCNTM]		= REG_FIELD(FXAS21002C_REG_RT_THS, 7, 7),
	[F_THS]			= REG_FIELD(FXAS21002C_REG_RT_SRC, 0, 6),
	[F_RT_COUNT]		= REG_FIELD(FXAS21002C_REG_RT_COUNT, 0, 7),
	[F_TEMP]		= REG_FIELD(FXAS21002C_REG_TEMP, 0, 7),
	[F_RST]			= REG_FIELD(FXAS21002C_REG_CTRL1, 6, 6),
	[F_ST]			= REG_FIELD(FXAS21002C_REG_CTRL1, 5, 5),
	[F_DR]			= REG_FIELD(FXAS21002C_REG_CTRL1, 2, 4),
	[F_ACTIVE]		= REG_FIELD(FXAS21002C_REG_CTRL1, 1, 1),
	[F_READY]		= REG_FIELD(FXAS21002C_REG_CTRL1, 0, 0),
	[F_INT_CFG_FIFO]	= REG_FIELD(FXAS21002C_REG_CTRL2, 7, 7),
	[F_INT_EN_FIFO]		= REG_FIELD(FXAS21002C_REG_CTRL2, 6, 6),
	[F_INT_CFG_RT]		= REG_FIELD(FXAS21002C_REG_CTRL2, 5, 5),
	[F_INT_EN_RT]		= REG_FIELD(FXAS21002C_REG_CTRL2, 4, 4),
	[F_INT_CFG_DRDY]	= REG_FIELD(FXAS21002C_REG_CTRL2, 3, 3),
	[F_INT_EN_DRDY]		= REG_FIELD(FXAS21002C_REG_CTRL2, 2, 2),
	[F_IPOL]		= REG_FIELD(FXAS21002C_REG_CTRL2, 1, 1),
	[F_PP_OD]		= REG_FIELD(FXAS21002C_REG_CTRL2, 0, 0),
	[F_WRAPTOONE]		= REG_FIELD(FXAS21002C_REG_CTRL3, 3, 3),
	[F_EXTCTRLEN]		= REG_FIELD(FXAS21002C_REG_CTRL3, 2, 2),
	[F_FS_DOUBLE]		= REG_FIELD(FXAS21002C_REG_CTRL3, 0, 0),
};

extern const struct dev_pm_ops fxas21002c_pm_ops;

int fxas21002c_core_probe(struct device *dev, struct regmap *regmap, int irq,
			  const char *name);
void fxas21002c_core_remove(struct device *dev);
#endif