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/*
 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
 *
 * Copyright 2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

&lbc {
	nor@0,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "cfi-flash";
		reg = <0x0 0x0 0x1000000>;
		bank-width = <2>;
		device-width = <1>;

		partition@0 {
			/* This location must not be altered  */
			/* 256KB for Vitesse 7385 Switch firmware */
			reg = <0x0 0x00040000>;
			label = "NOR Vitesse-7385 Firmware";
			read-only;
		};

		partition@40000 {
			/* 256KB for DTB Image */
			reg = <0x00040000 0x00040000>;
			label = "NOR DTB Image";
		};

		partition@80000 {
			/* 3.5 MB for Linux Kernel Image */
			reg = <0x00080000 0x00380000>;
			label = "NOR Linux Kernel Image";
		};

		partition@400000 {
			/* 10.75MB for JFFS2 based Root file System */
			reg = <0x00400000 0x00ac0000>;
			label = "NOR JFFS2 Root File System";
		};

		partition@ec0000 {
			/* This location must not be altered  */
			/* 256KB for QE ucode firmware*/
			reg = <0x00ec0000 0x00040000>;
			label = "NOR QE microcode firmware";
			read-only;
		};

		partition@f00000 {
			/* This location must not be altered  */
			/* 512KB for u-boot Bootloader Image */
			/* 512KB for u-boot Environment Variables */
			reg = <0x00f00000 0x00100000>;
			label = "NOR U-Boot Image";
		};
	};

	nand@1,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "fsl,p1021-fcm-nand",
			     "fsl,elbc-fcm-nand";
		reg = <0x1 0x0 0x40000>;

		partition@0 {
			/* This location must not be altered  */
			/* 1MB for u-boot Bootloader Image */
			reg = <0x0 0x00100000>;
			label = "NAND U-Boot Image";
			read-only;
		};

		partition@100000 {
			/* 1MB for DTB Image */
			reg = <0x00100000 0x00100000>;
			label = "NAND DTB Image";
		};

		partition@200000 {
			/* 4MB for Linux Kernel Image */
			reg = <0x00200000 0x00400000>;
			label = "NAND Linux Kernel Image";
		};

		partition@600000 {
			/* 4MB for Compressed Root file System Image */
			reg = <0x00600000 0x00400000>;
			label = "NAND Compressed RFS Image";
		};

		partition@a00000 {
			/* 7MB for JFFS2 based Root file System */
			reg = <0x00a00000 0x00700000>;
			label = "NAND JFFS2 Root File System";
		};

		partition@1100000 {
			/* 15MB for User Writable Area  */
			reg = <0x01100000 0x00f00000>;
			label = "NAND Writable User area";
		};
	};

	L2switch@2,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "vitesse-7385";
		reg = <0x2 0x0 0x20000>;
	};
};

&soc {
	i2c@3000 {
		rtc@68 {
			compatible = "pericom,pt7c4338";
			reg = <0x68>;
		};
	};

	spi@7000 {
		flash@0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "spansion,s25sl12801";
			reg = <0>;
			spi-max-frequency = <40000000>; /* input clock */

			partition@u-boot {
				/* 512KB for u-boot Bootloader Image */
				reg = <0x0 0x00080000>;
				label = "SPI Flash U-Boot Image";
				read-only;
			};

			partition@dtb {
				/* 512KB for DTB Image */
				reg = <0x00080000 0x00080000>;
				label = "SPI Flash DTB Image";
			};

			partition@kernel {
				/* 4MB for Linux Kernel Image */
				reg = <0x00100000 0x00400000>;
				label = "SPI Flash Linux Kernel Image";
			};

			partition@fs {
				/* 4MB for Compressed RFS Image */
				reg = <0x00500000 0x00400000>;
				label = "SPI Flash Compressed RFSImage";
			};

			partition@jffs-fs {
				/* 7MB for JFFS2 based RFS */
				reg = <0x00900000 0x00700000>;
				label = "SPI Flash JFFS2 RFS";
			};
		};
	};

	usb@22000 {
		phy_type = "ulpi";
	};

	mdio@24000 {
		phy0: ethernet-phy@0 {
			interrupt-parent = <&mpic>;
			interrupts = <3 1 0 0>;
			reg = <0x0>;
		};

		phy1: ethernet-phy@1 {
			interrupt-parent = <&mpic>;
			interrupts = <2 1 0 0>;
			reg = <0x1>;
		};

		tbi0: tbi-phy@11 {
			reg = <0x11>;
			device_type = "tbi-phy";
		};
	};

	mdio@25000 {
		tbi1: tbi-phy@11 {
			reg = <0x11>;
			device_type = "tbi-phy";
		};
	};

	mdio@26000 {
		tbi2: tbi-phy@11 {
			reg = <0x11>;
			device_type = "tbi-phy";
		};
	};

	ptp_clock@b0e00 {
		compatible = "fsl,etsec-ptp";
		reg = <0xb0e00 0xb0>;
		interrupts = <68 2 0 0 69 2 0 0>;
		fsl,tclk-period	= <10>;
		fsl,tmr-prsc	= <2>;
		fsl,tmr-add	= <0x80000016>;
		fsl,tmr-fiper1	= <999999990>;
		fsl,tmr-fiper2	= <99990>;
		fsl,max-adj	= <199999999>;
	};

	enet0: ethernet@b0000 {
		fixed-link = <1 1 1000 0 0>;
		phy-connection-type = "rgmii-id";

	};

	enet1: ethernet@b1000 {
		phy-handle = <&phy0>;
		tbi-handle = <&tbi1>;
		phy-connection-type = "sgmii";
	};

	enet2: ethernet@b2000 {
		phy-handle = <&phy1>;
		tbi-handle = <&tbi2>;
		phy-connection-type = "rgmii-id";
	};
};