summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/socfpga_cyclone5.dts
blob: 3ae8a83a08759021f2946f7872ceb3e53ce79c0a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/*
 *  Copyright (C) 2012 Altera Corporation <www.altera.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/dts-v1/;
/include/ "socfpga.dtsi"

/ {
	model = "Altera SOCFPGA Cyclone V";
	compatible = "altr,socfpga-cyclone5", "altr,socfpga";

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	memory {
		name = "memory";
		device_type = "memory";
		reg = <0x0 0x40000000>; /* 1GB */
	};

	soc {
		timer0@ffc08000 {
			clock-frequency = <100000000>;
		};

		timer1@ffc09000 {
			clock-frequency = <100000000>;
		};

		timer2@ffd00000 {
			clock-frequency = <25000000>;
		};

		timer3@ffd01000 {
			clock-frequency = <25000000>;
		};

		serial0@ffc02000 {
			clock-frequency = <100000000>;
		};

		serial1@ffc03000 {
			clock-frequency = <100000000>;
		};

		sysmgr@ffd08000 {
			cpu1-start-addr = <0xffd080c4>;
		};
	};
};