1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
|
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
#include "imx1-pinfunc.h"
#include <dt-bindings/clock/imx1-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
/*
* The decompressor and also some bootloaders rely on a
* pre-existing /chosen node to be available to insert the
* command line and merge other ATAGS info.
* Also for U-Boot there must be a pre-existing /memory node.
*/
chosen {};
memory { device_type = "memory"; };
aliases {
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
i2c0 = &i2c;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
spi0 = &cspi1;
spi1 = &cspi2;
};
aitc: aitc-interrupt-controller@223000 {
compatible = "fsl,imx1-aitc", "fsl,avic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x00223000 0x1000>;
};
cpus {
#size-cells = <0>;
#address-cells = <1>;
cpu@0 {
device_type = "cpu";
reg = <0>;
compatible = "arm,arm920t";
operating-points = <200000 1900000>;
clock-latency = <62500>;
clocks = <&clks IMX1_CLK_MCU>;
voltage-tolerance = <5>;
};
};
clocks {
clk32 {
compatible = "fsl,imx-clk32", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32000>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&aitc>;
ranges;
aipi@200000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00200000 0x10000>;
ranges;
gpt1: timer@202000 {
compatible = "fsl,imx1-gpt";
reg = <0x00202000 0x1000>;
interrupts = <59>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
};
gpt2: timer@203000 {
compatible = "fsl,imx1-gpt";
reg = <0x00203000 0x1000>;
interrupts = <58>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
};
fb: fb@205000 {
compatible = "fsl,imx1-fb";
reg = <0x00205000 0x1000>;
interrupts = <14>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER2>;
clock-names = "ipg", "ahb", "per";
status = "disabled";
};
uart1: serial@206000 {
compatible = "fsl,imx1-uart";
reg = <0x00206000 0x1000>;
interrupts = <30 29 26>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
uart2: serial@207000 {
compatible = "fsl,imx1-uart";
reg = <0x00207000 0x1000>;
interrupts = <24 23 20>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
pwm: pwm@208000 {
#pwm-cells = <2>;
compatible = "fsl,imx1-pwm";
reg = <0x00208000 0x1000>;
interrupts = <34>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
};
dma: dma@209000 {
compatible = "fsl,imx1-dma";
reg = <0x00209000 0x1000>;
interrupts = <61 60>;
clocks = <&clks IMX1_CLK_HCLK>,
<&clks IMX1_CLK_DMA_GATE>;
clock-names = "ipg", "ahb";
#dma-cells = <1>;
};
uart3: serial@20a000 {
compatible = "fsl,imx1-uart";
reg = <0x0020a000 0x1000>;
interrupts = <54 4 1>;
clocks = <&clks IMX1_CLK_UART3_GATE>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
};
aipi@210000 {
compatible = "fsl,aipi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x00210000 0x10000>;
ranges;
cspi1: spi@213000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-cspi";
reg = <0x00213000 0x1000>;
interrupts = <41>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
i2c: i2c@217000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-i2c";
reg = <0x00217000 0x1000>;
interrupts = <39>;
clocks = <&clks IMX1_CLK_HCLK>;
status = "disabled";
};
cspi2: spi@219000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx1-cspi";
reg = <0x00219000 0x1000>;
interrupts = <40>;
clocks = <&clks IMX1_CLK_DUMMY>,
<&clks IMX1_CLK_PER1>;
clock-names = "ipg", "per";
status = "disabled";
};
clks: ccm@21b000 {
compatible = "fsl,imx1-ccm";
reg = <0x0021b000 0x1000>;
#clock-cells = <1>;
};
iomuxc: iomuxc@21c000 {
compatible = "fsl,imx1-iomuxc";
reg = <0x0021c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio1: gpio@21c000 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c000 0x100>;
interrupts = <11>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@21c100 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c100 0x100>;
interrupts = <12>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@21c200 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c200 0x100>;
interrupts = <13>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@21c300 {
compatible = "fsl,imx1-gpio";
reg = <0x0021c300 0x100>;
interrupts = <62>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};
weim: weim@220000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,imx1-weim";
reg = <0x00220000 0x1000>;
clocks = <&clks IMX1_CLK_DUMMY>;
ranges = <
0 0 0x10000000 0x02000000
1 0 0x12000000 0x01000000
2 0 0x13000000 0x01000000
3 0 0x14000000 0x01000000
4 0 0x15000000 0x01000000
5 0 0x16000000 0x01000000
>;
status = "disabled";
};
esram: esram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x20000>;
};
};
};
|
