summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/bcm7445.dtsi
blob: 39ac7840d7eebfafd5be58dc2b3fa5c5b9d6c63b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
#include <dt-bindings/interrupt-controller/arm-gic.h>

#include "skeleton.dtsi"

/ {
	#address-cells = <2>;
	#size-cells = <2>;
	model = "Broadcom STB (bcm7445)";
	compatible = "brcm,bcm7445", "brcm,brcmstb";
	interrupt-parent = <&gic>;

	chosen {
		bootargs = "console=ttyS0,115200 earlyprintk";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "brcm,brahma-b15";
			device_type = "cpu";
			enable-method = "brcm,brahma-b15";
			reg = <0>;
		};

		cpu@1 {
			compatible = "brcm,brahma-b15";
			device_type = "cpu";
			enable-method = "brcm,brahma-b15";
			reg = <1>;
		};

		cpu@2 {
			compatible = "brcm,brahma-b15";
			device_type = "cpu";
			enable-method = "brcm,brahma-b15";
			reg = <2>;
		};

		cpu@3 {
			compatible = "brcm,brahma-b15";
			device_type = "cpu";
			enable-method = "brcm,brahma-b15";
			reg = <3>;
		};
	};

	gic: interrupt-controller@ffd00000 {
		compatible = "brcm,brahma-b15-gic", "arm,cortex-a15-gic";
		reg = <0x00 0xffd01000 0x00 0x1000>,
		      <0x00 0xffd02000 0x00 0x2000>,
		      <0x00 0xffd04000 0x00 0x2000>,
		      <0x00 0xffd06000 0x00 0x2000>;
		interrupt-controller;
		#interrupt-cells = <3>;
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
	};

	rdb {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges = <0 0x00 0xf0000000 0x1000000>;

		serial@40ab00 {
			compatible = "ns16550a";
			reg = <0x40ab00 0x20>;
			reg-shift = <2>;
			reg-io-width = <4>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <81000000>;
		};

		sun_top_ctrl: syscon@404000 {
			compatible = "brcm,bcm7445-sun-top-ctrl",
				     "syscon";
			reg = <0x404000 0x51c>;
		};

		hif_cpubiuctrl: syscon@3e2400 {
			compatible = "brcm,bcm7445-hif-cpubiuctrl",
				     "syscon";
			reg = <0x3e2400 0x5b4>;
		};

		hif_continuation: syscon@452000 {
			compatible = "brcm,bcm7445-hif-continuation",
				     "syscon";
			reg = <0x452000 0x100>;
		};

		irq0_intc: interrupt-controller@40a780 {
			compatible = "brcm,bcm7120-l2-intc";
			interrupt-parent = <&gic>;
			#interrupt-cells = <1>;
			reg = <0x40a780 0x8>;
			interrupt-controller;
			interrupts = <GIC_SPI 0x45 0x0>,
				     <GIC_SPI 0x43 0x0>;
			brcm,int-map-mask = <0x25c>, <0x7000000>;
			brcm,int-fwd-mask = <0x70000>;
		};
	};

	smpboot {
		compatible = "brcm,brcmstb-smpboot";
		syscon-cpu = <&hif_cpubiuctrl 0x88 0x178>;
		syscon-cont = <&hif_continuation>;
	};

	reboot {
		compatible = "brcm,brcmstb-reboot";
		syscon = <&sun_top_ctrl 0x304 0x308>;
	};
};