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# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
maintainers:
- Heiko Stuebner <heiko@sntech.de>
properties:
compatible:
enum:
- rockchip,px30-tsadc # PX30 SoCs
- rockchip,rv1108-tsadc # RV1108 SoCs
- rockchip,rk3228-tsadc # RK3228 SoCs
- rockchip,rk3288-tsadc # RK3288 SoCs
- rockchip,rk3328-tsadc # RK3328 SoCs
- rockchip,rk3368-tsadc # RK3368 SoCs
- rockchip,rk3399-tsadc # RK3399 SoCs
- rockchip,rk3568-tsadc # RK3568 SoCs
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: tsadc
- const: apb_pclk
resets:
maxItems: 1
reset-names:
items:
- const: tsadc-apb
"#thermal-sensor-cells":
const: 1
rockchip,grf:
description: The phandle of the syscon node for the general register file.
$ref: /schemas/types.yaml#/definitions/phandle
rockchip,hw-tshut-temp:
description: The hardware-controlled shutdown temperature value.
$ref: /schemas/types.yaml#/definitions/uint32
rockchip,hw-tshut-mode:
description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
rockchip,hw-tshut-polarity:
description: The hardware-controlled active polarity 0:LOW 1:HIGH.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- reset-names
- "#thermal-sensor-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/rk3288-cru.h>
tsadc: tsadc@ff280000 {
compatible = "rockchip,rk3288-tsadc";
reg = <0xff280000 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
clock-names = "tsadc", "apb_pclk";
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
#thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>;
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
};
|
