summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt
blob: a5bdff400002e159d14e975f99d8bb2263ba7d85 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
* DMA Engine.

The Octeon DMA Engine transfers between the Boot Bus and main memory.
The DMA Engine will be referred to by phandle by any device that is
connected to it.

Properties:
- compatible: "cavium,octeon-5750-bootbus-dma"

  Compatibility with all cn52XX, cn56XX and cn6XXX SOCs.

- reg: The base address of the DMA Engine's register bank.

- interrupts: A single interrupt specifier.

Example:
	dma0: dma-engine@1180000000100 {
		compatible = "cavium,octeon-5750-bootbus-dma";
		reg = <0x11800 0x00000100 0x0 0x8>;
		interrupts = <0 63>;
	};