summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
blob: 7dde7967c8869dfd5ffae6d343d2667f69a89533 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022 Renesas Electronics Corp.
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing

maintainers:
  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

description:
  The CRU image processing module is a data conversion module equipped with pixel
  color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and
  parallel (including ITU-R BT.656) input are provided as the image sensor interface.

properties:
  compatible:
    items:
      - enum:
          - renesas,r9a07g044-cru       # RZ/G2{L,LC}
          - renesas,r9a07g054-cru       # RZ/V2L
      - const: renesas,rzg2l-cru

  reg:
    maxItems: 1

  interrupts:
    maxItems: 3

  interrupt-names:
    items:
      - const: image_conv
      - const: image_conv_err
      - const: axi_mst_err

  clocks:
    items:
      - description: CRU Main clock
      - description: CRU Register access clock
      - description: CRU image transfer clock

  clock-names:
    items:
      - const: video
      - const: apb
      - const: axi

  power-domains:
    maxItems: 1

  resets:
    items:
      - description: CRU_PRESETN reset terminal
      - description: CRU_ARESETN reset terminal

  reset-names:
    items:
      - const: presetn
      - const: aresetn

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description:
          Input port node, single endpoint describing a parallel input source.

        properties:
          endpoint:
            $ref: video-interfaces.yaml#
            unevaluatedProperties: false

            properties:
              hsync-active: true
              vsync-active: true
              bus-width: true
              data-shift: true

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Input port node, describing the Image Processing module connected to the
          CSI-2 receiver.

    required:
      - port@0
      - port@1

required:
  - compatible
  - reg
  - interrupts
  - interrupt-names
  - clocks
  - clock-names
  - resets
  - reset-names
  - power-domains

additionalProperties: false

examples:
  # Device node example with CSI-2
  - |
    #include <dt-bindings/clock/r9a07g044-cpg.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    cru: video@10830000 {
        compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
        reg = <0x10830000 0x400>;
        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
        clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
                 <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
                 <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
        clock-names = "video", "apb", "axi";
        power-domains = <&cpg>;
        resets = <&cpg R9A07G044_CRU_PRESETN>,
                 <&cpg R9A07G044_CRU_ARESETN>;
        reset-names = "presetn", "aresetn";

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <0>;

                cru_parallel_in: endpoint@0 {
                    reg = <0>;
                    remote-endpoint= <&ov5642>;
                    hsync-active = <1>;
                    vsync-active = <1>;
                };
            };

            port@1 {
                #address-cells = <1>;
                #size-cells = <0>;
                reg = <1>;

                cru_csi_in: endpoint@0 {
                    reg = <0>;
                    remote-endpoint= <&csi_cru_in>;
                };
            };
        };
    };