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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Analogix Semiconductor, Inc.
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)

maintainers:
  - Xin Ji <xji@analogixsemi.com>

description: |
  The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
  designed for portable devices.

properties:
  compatible:
    items:
      - const: analogix,anx7625

  reg:
    maxItems: 1

  interrupts:
    description: used for interrupt pin B8.
    maxItems: 1

  enable-gpios:
    description: used for power on chip control, POWER_EN pin D2.
    maxItems: 1

  reset-gpios:
    description: used for reset chip control, RESET_N pin B7.
    maxItems: 1

  vdd10-supply:
    description: Regulator that provides the supply 1.0V power.

  vdd18-supply:
    description: Regulator that provides the supply 1.8V power.

  vdd33-supply:
    description: Regulator that provides the supply 3.3V power.

  analogix,lane0-swing:
    $ref: /schemas/types.yaml#/definitions/uint8-array
    minItems: 1
    maxItems: 20
    description:
      an array of swing register setting for DP tx lane0 PHY.
      Registers 0~9 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0,
      Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2,
      Swing1_Pre2, Swing0_Pre3, they are for [Boost control] and
      [Swing control] setting.
      Registers 0~9, bit 3:0 is [Boost control], these bits control
      post cursor manual, increase the [Boost control] to increase
      Pre-emphasis value.
      Registers 0~9, bit 6:4 is [Swing control], these bits control
      swing manual, increase [Swing control] setting to add Vp-p value
      for each Swing, Pre.
      Registers 10~19 are Swing0_Pre0, Swing1_Pre0, Swing2_Pre0,
      Swing3_Pre0, Swing0_Pre1, Swing1_Pre1, Swing2_Pre1, Swing0_Pre2,
      Swing1_Pre2, Swing0_Pre3, they are for [R select control] and
      [R Termination control] setting.
      Registers 10~19, bit 4:0 is [R select control], these bits are
      compensation manual, increase it can enhance IO driven strength
      and Vp-p.
      Registers 10~19, bit 5:6 is [R termination control], these bits
      adjust 50ohm impedance of DP tx termination. 00:55 ohm,
      01:50 ohm(default), 10:45 ohm, 11:40 ohm.

  analogix,lane1-swing:
    $ref: /schemas/types.yaml#/definitions/uint8-array
    minItems: 1
    maxItems: 20
    description:
      an array of swing register setting for DP tx lane1 PHY.
      DP TX lane1 swing register setting same with lane0
      swing, please refer lane0-swing property description.

  analogix,audio-enable:
    type: boolean
    description: let the driver enable audio HDMI codec function or not.

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description:
          Video port for MIPI DSI input.

      port@1:
        $ref: /schemas/graph.yaml#/properties/port
        description:
          Video port for panel or connector.

    required:
      - port@0
      - port@1

required:
  - compatible
  - reg
  - vdd10-supply
  - vdd18-supply
  - vdd33-supply
  - ports

additionalProperties: false

examples:
  - |
    #include <dt-bindings/gpio/gpio.h>

    i2c0 {
        #address-cells = <1>;
        #size-cells = <0>;

        encoder@58 {
            compatible = "analogix,anx7625";
            reg = <0x58>;
            enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
            reset-gpios = <&pio 73 GPIO_ACTIVE_HIGH>;
            vdd10-supply = <&pp1000_mipibrdg>;
            vdd18-supply = <&pp1800_mipibrdg>;
            vdd33-supply = <&pp3300_mipibrdg>;
            analogix,audio-enable;
            analogix,lane0-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;
            analogix,lane1-swing = /bits/ 8 <0x14 0x54 0x64 0x74>;

            ports {
                #address-cells = <1>;
                #size-cells = <0>;

                mipi2dp_bridge_in: port@0 {
                    reg = <0>;
                    anx7625_in: endpoint {
                        remote-endpoint = <&mipi_dsi>;
                    };
                };

                mipi2dp_bridge_out: port@1 {
                    reg = <1>;
                    anx7625_out: endpoint {
                        remote-endpoint = <&panel_in>;
                    };
                };
            };
        };
    };