summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/clock/intc_stratix10.txt
blob: 9f4ec5cb5c6b0764d0fee3661cb718be8879a98e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Device Tree Clock bindings for Intel's SoCFPGA Stratix10 platform

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Required properties:
- compatible : shall be
	"intel,stratix10-clkmgr"

- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.

- #clock-cells : from common clock binding, shall be set to 1.

Example:
	clkmgr: clock-controller@ffd10000 {
		compatible = "intel,stratix10-clkmgr";
		reg = <0xffd10000 0x1000>;
		#clock-cells = <1>;
	};