summaryrefslogtreecommitdiffstats
path: root/drivers/spi/spi-mt65xx.c
AgeCommit message (Expand)AuthorFilesLines
2022-04-19spi: mt65xx: Fix definitions indentationAngeloGioacchino Del Regno1-77/+77
2022-04-19spi: mt65xx: Add kerneldoc for driver structuresAngeloGioacchino Del Regno1-5/+34
2022-04-19spi: mt65xx: Simplify probe function with dev_err_probe()AngeloGioacchino Del Regno1-57/+29
2022-04-19spi: mt65xx: Move pm_runtime_enable() call to remove all gotosAngeloGioacchino Del Regno1-12/+6
2022-04-19spi: mt65xx: Move clock parent setting to remove clock disable gotosAngeloGioacchino Del Regno1-11/+8
2022-04-19spi: mt65xx: Add and use pointer to struct device in mtk_spi_probe()AngeloGioacchino Del Regno1-35/+35
2022-04-19spi: mt65xx: Switch to device_get_match_data()AngeloGioacchino Del Regno1-8/+1
2022-04-19spi: mt65xx: Simplify probe function with devm_spi_alloc_masterAngeloGioacchino Del Regno1-27/+16
2022-04-04spi: mediatek: support hclkLeilk Liu1-16/+69
2022-04-04spi: mediatek: add spi memory support for ipm designLeilk Liu1-1/+300
2022-03-15spi: mediatek: add ipm design support for MT7986Leilk Liu1-15/+87
2022-03-15spi: mediatek: support tick_delay without enhance_timingLeilk Liu1-3/+12
2022-02-17spi: New support and problem adjustment of SPI rockchipMark Brown1-1/+1
2022-01-31spi: mediatek: Avoid NULL pointer crash in interruptBenjamin Gaignard1-1/+1
2022-01-31spi: mt65xx: Convert to GPIO descriptorsLinus Walleij1-17/+6
2021-10-01spi: mediatek: skip delays if they are 0Dafna Hirschfeld1-28/+36
2021-08-26Merge remote-tracking branch 'spi/for-5.15' into spi-nextMark Brown1-54/+105
2021-08-09spi: mediatek: fix build warnning in set cs timingMason Zhang1-6/+6
2021-08-05spi: modify set_cs_timing parameterMason Zhang1-46/+61
2021-08-02spi: mediatek: Fix fifo transferGuenter Roeck1-14/+5
2021-07-14spi: mediatek: add tick_delay supportMason Zhang1-1/+10
2021-07-14spi: mediatek: move devm_spi_register_master positionMason Zhang1-6/+6
2021-07-11spi: mediatek: add no_need_unprepare supportMason Zhang1-7/+34
2021-07-11spi: mediatek: fix fifo rx modePeter Hess1-3/+13
2021-02-08spi: mediatek: add set_cs_timing supportleilk.liu1-16/+56
2020-07-22spi: mediatek: add spi support for mt8192 ICleilk.liu1-0/+3
2020-07-01spi: mediatek: use correct SPI_CFG2_REG MACROleilk.liu1-7/+8
2019-11-18spi: mediatek: add SPI_CS_HIGH supportLuhua Xu1-2/+10
2019-10-01spi: mediatek: Use devm_platform_ioremap_resource() in mtk_spi_probe()Markus Elfring1-10/+1
2019-09-13spi: mediatek: support large PAluhua.xu1-5/+39
2019-09-13spi: mediatek: add spi support for mt6765 ICluhua.xu1-0/+9
2019-08-02spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd1-1/+0
2019-06-10Merge tag 'v5.2-rc4' into spi-5.3Mark Brown1-9/+1
2019-06-06spi: mediatek: add SPI_LSB_FIRST supportLeilk Liu1-9/+6
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner1-9/+1
2018-11-27spi: mediatek: add spi support for mt7629 ICLeilk Liu1-0/+3
2018-11-06Merge branch 'spi-4.20' into spi-4.21 for uniphier DTMark Brown1-2/+2
2018-11-05spi: mediatek: add spi support for mt8183 ICLeilk Liu1-0/+9
2018-10-31spi: mediatek: use correct mata->xfer_len when in fifo transferLeilk Liu1-2/+2
2018-09-18spi: mediatek: Don't modify spi_transfer when transfer.Peter Shih1-16/+21
2017-06-20spi: mediatek: add spi support for mt2712 ICleilk.liu@mediatek.com1-0/+7
2017-06-13spi: mediatek: add spi support for mt7622 ICLeilk Liu1-0/+9
2017-06-13spi: mediatek: adjust register to enhance time accuracyLeilk Liu1-5/+40
2017-01-31spi: mediatek: Only do dma for 4-byte aligned buffersDaniel Kurtz1-4/+33
2016-07-27spi: mediatek: remove spi_master_put in mtk_spi_remove()Wei Yongjun1-1/+0
2016-01-11Merge remote-tracking branches 'spi/topic/lm70llp', 'spi/topic/loopback', 'sp...Mark Brown1-15/+21
2016-01-11Merge remote-tracking branch 'spi/fix/mtk' into spi-linusMark Brown1-10/+18
2015-12-31spi: mediatek: Add spi support for mt2701 ICLeilk Liu1-0/+3
2015-12-31spi: mediatek: merge all identical compat to mtk_common_compatLeilk Liu1-5/+10
2015-12-30spi: mediatek: Prevent overflows in FIFO transfersNicolas Boichat1-10/+18
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-20 11:53:11 +0000