Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-10-16 | soc: xilinx: Set CAP_UNUSABLE requirement for versal while powering down domain | Tejas Patel | 1 | -2/+8 |
2019-03-18 | drivers: Defer probe if firmware is not ready | Rajan Vaja | 2 | -12/+16 |
2019-02-12 | drivers: soc: xilinx: Add ZynqMP power domain driver | Jolly Shah | 3 | -0/+331 |
2019-02-12 | drivers: soc: xilinx: Add ZynqMP PM driver | Rajan Vaja | 3 | -0/+190 |
2018-01-16 | soc: xilinx: Fix Kconfig alignment | Michal Simek | 1 | -10/+10 |
2018-01-16 | soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv | Gustavo A. R. Silva | 1 | -1/+1 |
2018-01-16 | soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu | Dhaval Shah | 1 | -0/+1 |
2018-01-08 | soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver | Dhaval Shah | 3 | -0/+646 |
2018-01-08 | soc: xilinx: Create folder structure for soc specific drivers | Michal Simek | 2 | -0/+5 |