Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-09-30 | regulator: rtmv20: Add missing regcache cache only before marked as dirty | ChiYuan Huang | 1 | -0/+1 |
2020-09-30 | regulator: rtmv20: Update DT binding document and property name parsing | ChiYuan Huang | 1 | -16/+20 |
2020-09-28 | regulator: rtmv20: Adds support for Richtek RTMV20 load switch regulator | ChiYuan Huang | 1 | -0/+392 |