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path: root/drivers/pinctrl/renesas
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2021-01-18Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/li...Linus Walleij6-17/+4531
2021-01-14pinctrl: renesas: r8a779a0: Add TPU pins, groups and functionsUlrich Hecht1-0/+44
2021-01-14pinctrl: renesas: r8a779a0: Add TMU pins, groups and functionsUlrich Hecht1-0/+65
2021-01-14pinctrl: renesas: r8a779a0: Add QSPI pins, groups, and functionsUlrich Hecht1-0/+72
2021-01-14pinctrl: renesas: r8a779a0: Add PWM pins, groups and functionsUlrich Hecht1-0/+77
2021-01-14pinctrl: renesas: r8a779a0: Add MSIOF pins, groups and functionsUlrich Hecht1-0/+362
2021-01-14pinctrl: renesas: r8a779a0: Add MMC pins, groups and functionsUlrich Hecht1-0/+79
2021-01-14pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and functionUlrich Hecht1-0/+62
2021-01-14pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functionsUlrich Hecht1-0/+134
2021-01-14pinctrl: renesas: r8a779a0: Add DU pins, groups and functionUlrich Hecht1-0/+54
2021-01-14pinctrl: renesas: r8a779a0: Add CANFD pins, groups and functionsUlrich Hecht1-0/+137
2021-01-14pinctrl: renesas: r8a779a0: Add EtherAVB pins, groups and functionsUlrich Hecht1-0/+595
2021-01-14pinctrl: renesas: r8a779a0: Add I2C pins, groups and functionsUlrich Hecht1-0/+107
2021-01-14pinctrl: renesas: r8a779a0: Add SCIF pins, groups and functionsUlrich Hecht1-0/+156
2021-01-14pinctrl: renesas: Initial R8A779A0 (V3U) PFC supportUlrich Hecht5-0/+2529
2021-01-14pinctrl: renesas: Add PORT_GP_CFG_{2,31} macrosUlrich Hecht1-4/+12
2021-01-14pinctrl: renesas: Add I/O voltage level flagUlrich Hecht2-2/+23
2021-01-14pinctrl: renesas: Implement unlock register masksUlrich Hecht2-11/+19
2021-01-12pinctrl: renesas: checker: Restrict checks to Renesas platformsGeert Uytterhoeven1-0/+4
2021-01-05pinctrl: remove empty lines in pinctrl subsystemZhaoyu Liu4-4/+0
2020-11-23pinctrl: renesas: Fix fall-through warnings for ClangGustavo A. R. Silva1-0/+1
2020-11-23pinctrl: renesas: r8a77965: Add QSPI[01] pins, groups and functionsLad Prabhakar1-2/+73
2020-11-23pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functionsLad Prabhakar1-2/+73
2020-11-23pinctrl: renesas: r8a77951: Add QSPI[01] pins, groups and functionsLad Prabhakar1-2/+73
2020-11-23pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups and functionsLad Prabhakar1-2/+73
2020-11-13pinctrl: renesas: Constify sh73a0_vccq_mc0_opsRikard Falkeborn1-1/+1
2020-11-13pinctrl: renesas: Protect GPIO leftovers by CONFIG_PINCTRL_SH_FUNC_GPIOGeert Uytterhoeven3-3/+11
2020-11-13pinctrl: renesas: r8a7778: Use common R-Car bias handlingGeert Uytterhoeven2-40/+10
2020-11-13pinctrl: renesas: r8a7778: Use physical addresses for PUPR regsGeert Uytterhoeven1-15/+9
2020-11-13pinctrl: renesas: Factor out common R-Car Gen3 bias handlingGeert Uytterhoeven7-215/+54
2020-11-13pinctrl: renesas: Optimize sh_pfc_pin_configGeert Uytterhoeven1-6/+4
2020-11-13pinctrl: renesas: Reorder struct sh_pfc_pin to remove holeGeert Uytterhoeven1-2/+2
2020-11-13pinctrl: renesas: Singular/plural grammar fixesGeert Uytterhoeven2-4/+4
2020-11-13pinctrl: renesas: Remove superfluous goto in sh_pfc_gpio_set_direction()Geert Uytterhoeven1-5/+0
2020-11-13pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[34]Biju Das1-0/+18
2020-11-13pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742Biju Das1-0/+14
2020-11-13pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0Biju Das1-0/+12
2020-11-13pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1Biju Das1-0/+12
2020-11-13pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1Biju Das1-0/+12
2020-11-13pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1Biju Das1-2/+12
2020-10-26pinctrl: renesas: r8a7790: Add VIN1-B and VIN2-G pins, groups and functionsLad Prabhakar1-1/+131
2020-09-15pinctrl: renesas: Reintroduce SH_PFC for common sh-pfc codeGeert Uytterhoeven2-10/+42
2020-09-15pinctrl: Rename sh-pfc to renesasGeert Uytterhoeven41-0/+110424