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2021-12-30Merge tag 'phy-for-5.17' of ↵Greg Kroah-Hartman1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy-for-5.17 - New support: - Qualcomm eDP PHY driver - Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support - Lan966x ethernet serdes PHY driver - Support for uniphier NXI & Pro4 SoC - Qualcomm SM6350 USB2 support - Amlogic Meson8 HDMI TX PHY driver - Rockchip rk3568 usb2 support - Intel Thunder Bay eMMC PHY driver - Freescale IMX8 PCIe phy driver - Updates: - Cadence Sierra driver updates for multilink configurations - Bcm usb2 updates for Phy reg space * tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits) phy: cadence: Sierra: Add support for derived reference clock output dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration phy: cadence: Sierra: Add support for PHY multilink configurations phy: cadence: Sierra: Fix to get correct parent for mux clocks phy: cadence: Sierra: Update single link PCIe register configuration phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation phy: cadence: Sierra: Check cmn_ready assertion during PHY power on phy: cadence: Sierra: Add PHY PCS common register configurations phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation phy: cadence: Sierra: Add support to get SSC type from device tree dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names phy: cadence: Sierra: Prepare driver to add support for multilink configurations phy: cadence: Sierra: Use of_device_get_match_data() to get driver data phy: mediatek: Fix missing check in mtk_mipi_tx_probe phy: uniphier-usb3ss: fix unintended writing zeros to PHY register phy: phy-mtk-tphy: use new io helpers to access register phy: phy-mtk-xsphy: use new io helpers to access register phy: mediatek: add helpers to update bits of registers ...
2021-12-14phy: ti: Use IS_ERR_OR_NULL() to clean codeMiaoqian Lin1-3/+3
Use IS_ERR_OR_NULL() to make the code cleaner. Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20211212142226.23674-1-linmq006@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-23phy: ti: omap-usb2: Fix the kernel-doc styleVinod Koul1-3/+3
The documentation uses incorrect style, so fix that. drivers/phy/ti/phy-omap-usb2.c:102: warning: Function parameter or member 'comparator' not described in 'omap_usb2_set_comparator' While at it, use a single line for function description Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Liam Beguin <liambeguin@gmail.com> Link: https://lore.kernel.org/r/20211120061531.410771-2-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-20phy: ti: tusb1210: Fix the kernel-doc warnVinod Koul1-1/+1
The comment is not kernel-doc one and starts with /**, so fix that. drivers/phy/ti/phy-tusb1210.c:16: warning: expecting prototype for tusb1210.c(). Prototype was for TUSB1210_VENDOR_SPECIFIC2() instead Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Liam Beguin <liambeguin@gmail.com> Link: https://lore.kernel.org/r/20211116103951.34482-6-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-11-16phy: ti: report 2 non-kernel-doc commentsRandy Dunlap2-2/+2
Do not use "/**" to begin a non-kernel-doc comment. Fixes these build warnings: drivers/phy/ti/phy-am654-serdes.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * PCIe SERDES driver for AM654x SoC drivers/phy/ti/phy-j721e-wiz.c:3: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Wrapper driver for SERDES used in J721E Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reported-by: kernel test robot <lkp@intel.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: linux-phy@lists.infradead.org Link: https://lore.kernel.org/r/20211115030559.13994-1-rdunlap@infradead.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-26phy: ti: gmii-sel: check of_get_address() for failureDan Carpenter1-0/+2
Smatch complains that if of_get_address() returns NULL, then "size" isn't initialized. Also it would lead to an Oops. Fixes: 7f78322cdd67 ("phy: ti: gmii-sel: retrieve ports number and base offset from dt") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20210914110038.GB11657@kili Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-08-06phy: phy-twl4030-usb: Disable PHY for suspendTony Lindgren1-0/+15
Since commit 88d26136a256 ("PM: Prevent runtime suspend during system resume"), PM runtime will not let devices idle during system suspend. This is because of the pm_runtime_get_noresume() call done in device_prepare() that is not released until at device_complete() after resume. We must now disable the USB PHY in suspend if no USB cable is connected. Cc: Andreas Kemnade <andreas@kemnade.info> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20210727104512.52968-1-tony@atomide.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-06-23Merge tag 'phy-for-5.14_v2' of ↵Greg Kroah-Hartman2-7/+16
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy-for-5.14 version 2 - Updates: - Yaml conversion for renesas,rcar-gen3 pcie phy and rockchip-usb-phy bindings - Support for devm_phy_get() taking NULL phy name - New support: - PCIe phy for Qualcomm IPQ60xx - PCIe phy for Qualcomm SDX55 - USB phy for RK3308 - CAN transceivers phy for TI TCAN104x - Innosilicon-based CSI dphy for rockchip * tag 'phy-for-5.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (36 commits) phy: Revert "phy: ralink: Kconfig: convert mt7621-pci-phy into 'bool'" phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe() phy: uniphier-pcie: Fix updating phy parameters phy/rockchip: add Innosilicon-based CSI dphy dt-bindings: phy: add yaml binding for rockchip-inno-csi-dphy phy: rockchip: remove redundant initialization of pointer cfg phy: phy-can-transceiver: Add support for generic CAN transceiver driver dt-bindings: phy: Add binding for TI TCAN104x CAN transceivers phy: core: Reword the comment specifying the units of max_link_rate to be Mbps phy: phy-mtk-hdmi: Remove redundant dev_err call in mtk_hdmi_phy_probe() phy: phy-mtk-mipi-dsi: Remove redundant dev_err call in mtk_mipi_tx_probe() phy: phy-mmp3-hsic: Remove redundant dev_err call in mmp3_hsic_phy_probe() phy: bcm-ns-usb3: Remove redundant dev_err call in bcm_ns_usb3_mdio_probe() MAINTAINERS: update marvell,armada-3700-utmi-phy.yaml reference phy: phy-twl4030-usb: use DEVICE_ATTR_RO macro dt-bindings: phy: convert rockchip-usb-phy.txt to YAML phy: phy-rockchip-inno-usb2: add support for RK3308 USB phy dt-bindings: phy: rockchip-inno-usb2: add compatible for rk3308 USB phy phy: stm32: manage optional vbus regulator on phy_power_on/off dt-bindings: phy: add vbus-supply optional property to phy-stm32-usbphyc ...
2021-06-21phy: ti: dm816x: Fix the error handling path in 'dm816x_usb_phy_probe()Christophe JAILLET1-4/+13
Add an error handling path in the probe to release some resources, as already done in the remove function. Fixes: 609adde838f4 ("phy: Add a driver for dm816x USB PHY") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/ac5136881f6bdec50be19b3bf73b3bc1b15ef1f1.1622898974.git.christophe.jaillet@wanadoo.fr Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-05-31phy: ti: Fix an error code in wiz_probe()Yang Li1-0/+1
When the code execute this if statement, the value of ret is 0. However, we can see from the dev_err() log that the value of ret should be -EINVAL. Clean up smatch warning: drivers/phy/ti/phy-j721e-wiz.c:1216 wiz_probe() warn: missing error code 'ret' Reported-by: Abaci Robot <abaci@linux.alibaba.com> Fixes: c9f9eba06629 ("phy: ti: j721e-wiz: Manage typec-gpio-dir") Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1621939832-65535-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-05-31phy: phy-twl4030-usb: use DEVICE_ATTR_RO macroYueHaibing1-3/+3
Use DEVICE_ATTR_RO helper instead of plain DEVICE_ATTR, which makes the code a bit shorter and easier to read. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20210520135132.37628-1-yuehaibing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-04-16phy: Revert "phy: ti: j721e-wiz: add missing of_node_put"Vinod Koul1-1/+0
This reverts commit 00f2e6f668b0 ("phy: ti: j721e-wiz: add missing of_node_put") as it erroneously adds the of_node_put() as incorrect place. Reported-by: Junlin Yang <yangjunlin@yulong.com> Link: https://lore.kernel.org/r/20210408062914.3813102-1-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-16phy: ti: j721e-wiz: Add missing include linux/slab.hShixin Liu1-0/+1
When compiling with CONFIG_PHY_J721E_WIZ, Hulk Robot reported: drivers/phy/ti/phy-j721e-wiz.c: In function ‘wiz_mux_clk_register’: drivers/phy/ti/phy-j721e-wiz.c:659:17: error: implicit declaration of function ‘kzalloc’; did you mean ‘vzalloc’? [-Werror=implicit-function-declaration] 659 | parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL); | ^~~~~~~ | vzalloc drivers/phy/ti/phy-j721e-wiz.c:659:15: warning: assignment to ‘const char **’ from ‘int’ makes pointer from integer without a cast [-Wint-conversion] 659 | parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL); | ^ drivers/phy/ti/phy-j721e-wiz.c:697:2: error: implicit declaration of function ‘kfree’; did you mean ‘vfree’? [-Werror=implicit-function-declaration] 697 | kfree(parent_names); | ^~~~~ | vfre Fixes: 040cbe768731 ("phy: ti: j721e-wiz: Model the internal clocks without device tree input") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Shixin Liu <liushixin2@huawei.com> Link: https://lore.kernel.org/r/20210408012829.432938-1-liushixin2@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-16phy: phy-twl4030-usb: Fix possible use-after-free in twl4030_usb_remove()Yang Yingliang1-1/+1
This driver's remove path calls cancel_delayed_work(). However, that function does not wait until the work function finishes. This means that the callback function may still be running after the driver's remove function has finished, which would result in a use-after-free. Fix by calling cancel_delayed_work_sync(), which ensures that the work is properly cancelled, no longer running, and unable to re-schedule itself. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210407092716.3270248-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-31phy: ti: j721e-wiz: Configure 'p_standard_mode' only for DP/QSGMIIKishon Vijay Abraham I1-0/+2
Configure 'p_standard_mode' only for DP/QSGMII as for other modes it's not used as per the programming sequence. Add "continue" in the else to prevent random value from being written to p_standard_mode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210331131417.15596-1-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31phy: ti: j721e-wiz: Do not configure wiz if its already configuredFaiz Abbas1-5/+16
Serdes lanes might be shared between multiple cores in some usecases and its not possible to lock PLLs for both the lanes independently by the two cores. This requires a bootloader to configure both the lanes at early boot time. To handle this case, skip all configuration if any of the lanes has already been enabled. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210330110138.24356-2-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31phy: ti: j721e-wiz: Get PHY properties only for "phy" or "link" subnodeKishon Vijay Abraham I1-0/+4
"serdes" node (child node of WIZ) can have sub-nodes for representing links or it can have sub-nodes for representing the various clocks within the serdes. Instead of trying to read "reg" from every child node used for assigning "lane_phy_type", read only if the child node's name is "phy" or "link" subnode. Ideally all PHY dt nodes should have node name as "phy", however existing devicetree used "link" as subnode. So in order to maintain old DT compatibility get PHY properties for "phy" or "link" subnode. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210319124128.13308-5-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-31phy: ti: j721e-wiz: Invoke wiz_init() before of_platform_device_create()Kishon Vijay Abraham I1-10/+7
Invoke wiz_init() before configuring anything else in Sierra/Torrent (invoked as part of of_platform_device_create()). wiz_init() resets the SERDES device and any configuration done in the probe() of Sierra/Torrent will be lost. In order to prevent SERDES configuration from getting reset, invoke wiz_init() immediately before invoking of_platform_device_create(). Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Swapnil Jakhade <sjakhade@cadence.com> Cc: <stable@vger.kernel.org> # v5.10 Link: https://lore.kernel.org/r/20210319124128.13308-3-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: add missing call to of_node_put()Yang Li1-0/+1
In one of the error paths of the for_each_child_of_node() loop in of_property_read_u32, add missing call to of_node_put(). Fix the following coccicheck warning: ./drivers/phy/ti/phy-j721e-wiz.c:786:1-23: WARNING: Function "for_each_child_of_node" should have of_node_put() before return around line 795. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1614244674-66556-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Add support for configuring QSGMIIKishon Vijay Abraham I1-2/+62
Configure MAC clock dividers required for QSGMII to be functional. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Link: https://lore.kernel.org/r/1614838096-32291-3-git-send-email-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Enable reference clock output in cmn_refclk_<p/m>Kishon Vijay Abraham I1-0/+89
cmn_refclk_<p/m> lines in Torrent SERDES is used for connecting external reference clock. cmn_refclk_<p/m> can also be configured to output the reference clock. In order to drive the refclk out from the SERDES (Cadence Torrent), PHY_EN_REFCLK should be set in SERDES_RST of WIZ. Model PHY_EN_REFCLK as a clock, so that platforms like AM642 EVM can enable it. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-6-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Model the internal clocks without device tree inputKishon Vijay Abraham I1-5/+139
commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled the internal clocks depending on the subnodes that are populated in device tree. However recent discussions in the mailing list [1] suggested to just add #clock cells in the parent DT node and model the clocks within the driver. Model the mux clocks without device tree input for AM64x SoC. Don't remove the earlier design since DT nodes for J7200 and J721e are already upstreamed. [1] -> http://lore.kernel.org/r/20210108025943.GA1790601@robh.at.kernel.org Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-5-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Configure full rate divider for AM64Kishon Vijay Abraham I1-3/+36
The frequency of the txmclk between PCIe and SERDES has changed to 250MHz from 500MHz. Configure full rate divider for AM64 accordingly. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-4-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Delete "clk_div_sel" clk provider during cleanupKishon Vijay Abraham I1-0/+6
commit 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") modeled both MUX clocks and DIVIDER clocks in wiz. However during cleanup, it removed only the MUX clock provider. Remove the DIVIDER clock provider here. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-3-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-30phy: ti: j721e-wiz: Remove "regmap_field" from wiz_clk_{mux|div}_selKishon Vijay Abraham I1-41/+34
Both "struct wiz_clk_div_sel" and "struct wiz_clk_mux_sel" are static data that is common for all wiz instances. Including "struct regmap_field" for each of the wiz instances can yield undesirable results. Move "struct regmap_field" out of "struct wiz_clk_div_sel" and "struct wiz_clk_mux_sel" and make them point to constant data. So far no issues are observed since both these structures are not accessed outside the probe. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Link: https://lore.kernel.org/r/20210310120840.16447-2-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-15phy: ti: j721e-wiz: add missing of_node_putJunlin Yang1-0/+1
Fix OF node leaks by calling of_node_put in for_each_child_of_node when the cycle returns. Generated by: scripts/coccinelle/iterators/for_each_child.cocci Signed-off-by: Junlin Yang <yangjunlin@yulong.com> Link: https://lore.kernel.org/r/20210216082739.1414-1-angkery@163.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-03-12phy: tusb1210: use bitmasks to set VENDOR_SPECIFIC2Liam Beguin1-13/+14
Start by reading the content of the VENDOR_SPECIFIC2 register and update each bit field based on device properties when defined. The use of bit masks prevents fields from overriding each other and enables users to clear bits which are set by default, like datapolarity in this instance. Signed-off-by: Liam Beguin <lvb@xiphos.com> Link: https://lore.kernel.org/r/20201211191241.21306-1-liambeguin@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16phy: ti: convert to devm_platform_ioremap_resource(_byname)Chunfeng Yun3-25/+11
Use devm_platform_ioremap_resource(_byname) to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1604642930-29019-17-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-10-05Merge 5.9-rc8 into usb-nextGreg Kroah-Hartman1-2/+4
We need the USB fixes in here as well for testing. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-09-08phy: ti: am654: Fix a leak in serdes_am654_probe()Dan Carpenter1-2/+4
If devm_phy_create() fails then we need to call of_clk_del_provider(node) to undo the call to of_clk_add_provider(). Fixes: 71e2f5c5c224 ("phy: ti: Add a new SERDES driver for TI's AM654x SoC") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20200905124648.GA183976@mwanda Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-08phy: ti: gmii-sel: retrieve ports number and base offset from dtGrygorii Strashko1-11/+33
On K3 AM654x/J721E platforms the Port MII mode selection register(s) have similar format and placed in the System Control Module (SCM) module sequentially as one register per port, but, depending SOC and CPSW instance, the base offset and number of ports can be different. Hence, add possibility to retrieve number of ports and base registers offset from DT and support for max possible number of ports supported by K3 SoCs like J721E. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-4-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-08phy: ti: gmii-sel: use features mask during initGrygorii Strashko1-8/+2
Use features mask during PHYs initialization to simplify code. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-3-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-09-08phy: ti: gmii-sel: move phy init in separate functionGrygorii Strashko1-47/+64
Move phy initialization in separate function to improve code readability and simplify future changes. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lore.kernel.org/r/20200828201943.29155-2-grygorii.strashko@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-31phy: omap-usb2-phy: fix coding style issuesRoger Quadros1-19/+17
Fix checkpatch warnings and sort the include files alphabetically. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200824075127.14902-3-rogerq@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-31Merge branch 'fixes' into nextVinod Koul1-7/+40
2020-08-31phy: omap-usb2-phy: disable PHY charger detectRoger Quadros1-7/+40
AM654x PG1.0 has a silicon bug that D+ is pulled high after POR, which could cause enumeration failure with some USB hubs. Disabling the USB2_PHY Charger Detect function will put D+ into the normal state. This addresses Silicon Errata: i2075 - "USB2PHY: USB2PHY Charger Detect is Enabled by Default Without VBUS Presence" Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com> Link: https://lore.kernel.org/r/20200824075127.14902-2-rogerq@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-23phy: ti: j721e-wiz: Remove duplicate includeYueHaibing1-1/+0
Remove duplicate include file Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20200818114721.55464-1-yuehaibing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-23phy: ti: am654: update PCIe serdes configSekhar Nori1-5/+135
Update PCIe serdes config to latest suggested for hardware. This fixes cases of failure to enumerate in Gen2 mode with some cards. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200727194603.44636-4-nsekhar@ti.com [fix typo threshold] Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-23phy: ti: am654: simplify return handlingSekhar Nori1-28/+20
Checking return value after each regfield write becomes hard to read quickly as number of writes increase. Simplify by checking for error only once. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200727194603.44636-3-nsekhar@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-23phy: ti: am654: simplify regfield handlingSekhar Nori1-93/+68
regfield handling in current driver code is made complicated by having a separate regfield variable for each field which is allocated individually. This quickly gets unwieldy once number of regfields increase. Instead, use an array of regfields which are allocated in a loop. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Link: https://lore.kernel.org/r/20200727194603.44636-2-nsekhar@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-17Merge branch 'fixes' into nextVinod Koul2-6/+6
2020-07-08phy: ti-pipe3: remove set but unused variableVinod Koul1-3/+2
ti_pipe3_power_on() sets variable 'ret' but never uses it, so remove it. drivers/phy/ti/phy-ti-pipe3.c:340:6: warning: variable ‘ret’ set but not used [-Wunused-but-set-variable] Link: https://lore.kernel.org/r/20200629145010.122675-4-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-08phy: ti: dm816x: remove set but unused variableVinod Koul1-6/+5
dm816x_usb_phy_init() sets variable 'error' but never uses it, so remove it. drivers/phy/ti/phy-dm816x-usb.c:85:6: warning: variable ‘error’ set but not used [-Wunused-but-set-variable] Link: https://lore.kernel.org/r/20200629145010.122675-3-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24phy: ti: j721e-wiz: Constify structsRikard Falkeborn1-5/+5
clk_div_table and wiz_regmap_config are not modified and can therefore be made const to allow the compiler to put them in read-only memory. Before: text data bss dec hex filename 20265 7044 64 27373 6aed drivers/phy/ti/phy-j721e-wiz.o After: text data bss dec hex filename 20649 6660 64 27373 6aed drivers/phy/ti/phy-j721e-wiz.o Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200524095516.25227-3-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24phy: ti: am654-serdes: Constify regmap_configRikard Falkeborn1-1/+1
regmap_config is not modified and can be made static to allow the compiler to put it in read-only memory. Before: text data bss dec hex filename 12328 3644 64 16036 3ea4 drivers/phy/ti/phy-am654-serdes.o After: text data bss dec hex filename 12648 3324 64 16036 3ea4 drivers/phy/ti/phy-am654-serdes.o Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200524095516.25227-2-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-05-18phy: ti: am654: add support for USB super-speedRoger Quadros1-2/+101
The SERDES PHY can support USB super-speed lane. Add support for that. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200513131254.10497-3-rogerq@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18phy: ti: am654: show up in regmap debugfsRoger Quadros1-0/+1
The max_register property must be set in order to show up the registers in debugfs. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200513131254.10497-2-rogerq@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-18phy: omap-usb2: Clean up exported headerRoger Quadros1-4/+56
Move private definitions from header to phy-omap-usb2.c file. Get rid of unused data structures usb_dpll_params and omap_usb_phy_type. Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200515080518.26870-2-rogerq@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-05-13phy: ti: j721e-wiz: Fix some error return code in wiz_probe()Wei Yongjun1-1/+5
Fix to return negative error code from some error handling cases instead of 0, as done elsewhere in this function. Fixes: 091876cc355d ("phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20200507054109.110849-1-weiyongjun1@huawei.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-04-24phy: ti: j721e-wiz: Implement DisplayPort mode to the wiz driverJyri Sarha1-4/+55
For DisplayPort use we need to set WIZ_CONFIG_LANECTL register's P_STANDARD_MODE bits to "mode 3". In the DisplayPort use also the P_ENABLE bits of the same register are set to P_ENABLE instead of P_ENABLE_FORCE, so that the DisplayPort driver can enable and disable the lane as needed. The DisplayPort mode is selected according to "cdns,phy-type"-properties found in link subnodes under the managed serdes (see "ti,sierra-phy-t0" and "ti,j721e-serdes-10g" devicetree bindings for details). All other values of "cdns,phy-type"-property but PHY_TYPE_DP will set P_STANDARD_MODE bits to 0 and P_ENABLE bits to force enable. Signed-off-by: Jyri Sarha <jsarha@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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