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2021-12-03mtd: rawnand: fsmc: Fix timing computationHerve Codina1-8/+24
Under certain circumstances, the timing settings calculated by the FSMC NAND controller driver were inaccurate. These settings led to incorrect data reads or fallback to timing mode 0 depending on the NAND chip used. The timing computation did not take into account the following constraint given in SPEAr3xx reference manual: twait >= tCEA - (tset * TCLK) + TOUTDEL + TINDEL Enhance the timings calculation by taking into account this additional constraint. This change has no impact on slow timing modes such as mode 0. Indeed, on mode 0, computed values are the same with and without the patch. NANDs which previously stayed in mode 0 because of fallback to mode 0 can now work at higher speeds and NANDs which were not working at all because of the corrupted data work at high speeds without troubles. Overall improvement on a Micron/MT29F1G08 (flash_speed tool): mode0 mode3 eraseblock write speed 3220 KiB/s 4511 KiB/s eraseblock read speed 4491 KiB/s 7529 KiB/s Fixes: d9fb079571833 ("mtd: nand: fsmc: add support for SDR timings") Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211119150316.43080-5-herve.codina@bootlin.com
2021-12-03mtd: rawnand: fsmc: Take instruction delay into accountHerve Codina1-0/+4
The FSMC NAND controller should apply a delay after the instruction has been issued on the bus. The FSMC NAND controller driver did not handle this delay. Add this waiting delay in the FSMC NAND controller driver. Fixes: 4da712e70294 ("mtd: nand: fsmc: use ->exec_op()") Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211119150316.43080-4-herve.codina@bootlin.com
2021-10-15mtd: rawnand: fsmc: Fix use of SM ORDERMiquel Raynal1-1/+3
The introduction of the generic ECC engine API lead to a number of changes in various drivers which broke some of them. Here is a typical example: I expected the SM_ORDER option to be handled by the Hamming ECC engine internals. Problem: the fsmc driver does not instantiate (yet) a real ECC engine object so we had to use a 'bare' ECC helper instead of the shiny rawnand functions. However, when not intializing this engine properly and using the bare helpers, we do not get the SM ORDER feature handled automatically. It looks like this was lost in the process so let's ensure we use the right SM ORDER now. Fixes: ad9ffdce4539 ("mtd: rawnand: fsmc: Fix external use of SW Hamming ECC helper") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210928221507.199198-2-miquel.raynal@bootlin.com
2021-05-10mtd: rawnand: fsmc: Fix external use of SW Hamming ECC helperMiquel Raynal1-1/+11
Since the Hamming software ECC engine has been updated to become a proper and independent ECC engine, it is now mandatory to either initialize the engine before using any one of his functions or use one of the bare helpers which only perform the calculations. As there is no actual need for a proper ECC initialization, let's just use the bare helper instead of the rawnand one. Fixes: 90ccf0a0192f ("mtd: nand: ecc-hamming: Rename the exported functions") Cc: stable@vger.kernel.org Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210413161840.345208-3-miquel.raynal@bootlin.com
2021-04-15Merge tag 'nand/for-5.13' of ↵Richard Weinberger1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next MTD core: * Handle possible -EPROBE_DEFER from parse_mtd_partitions() NAND core: * Fix error handling in nand_prog_page_op() (x2) * Add a helper to retrieve the number of ECC bytes per step * Add a helper to retrieve the number of ECC steps * Let ECC engines advertize the exact number of steps * ECC Hamming: - Populate the public nsteps field - Use the public nsteps field * ECC BCH: - Populate the public nsteps field - Use the public nsteps field Raw NAND core: * Add support for secure regions in NAND memory * Try not to use the ECC private structures * Remove duplicate include in rawnand.h * BBT: - Skip bad blocks when searching for the BBT in NAND Raw NAND controller drivers: * Qcom: - Convert bindings to YAML - Use dma_mapping_error() for error check - Add missing nand_cleanup() in error path - Return actual error code instead of -ENODEV - Update last code word register - Add helper to configure location register - Rename parameter name in macro - Add helper to check last code word - Convert nandc to chip in Read/Write helper - Update register macro name for 0x2c offset * GPMI: - Fix a double free in gpmi_nand_init * Rockchip: - Use flexible-array member instead of zero-length array * Atmel: - Update ecc_stats.corrected counter * MXC: - Remove unneeded of_match_ptr() * R852: - replace spin_lock_irqsave by spin_lock in hard IRQ * Brcmnand: - Move to polling in pio mode on oops write - Read/write oob during EDU transfer - Fix OOB R/W with Hamming ECC * FSMC: - Fix error code in fsmc_nand_probe() * OMAP: - Use ECC information from the generic structures SPI-NAND core: * Add missing MODULE_DEVICE_TABLE() SPI-NAND drivers: * gigadevice: Support GD5F1GQ5UExxG
2021-03-11mtd: rawnand: fsmc: Fix fall-through warnings for ClangGustavo A. R. Silva1-0/+1
In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning by explicitly adding a break statement instead of letting the code fall through to the next case. Link: https://github.com/KSPP/linux/issues/115 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210305082559.GA137646@embeddedor
2021-03-11mtd: rawnand: fsmc: Fix error code in fsmc_nand_probe()Dan Carpenter1-0/+2
If dma_request_channel() fails then the probe fails and it should return a negative error code, but currently it returns success. fixes: 4774fb0a48aa ("mtd: nand/fsmc: Add DMA support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/YCqaOZ83OvPOzLwh@mwanda
2020-12-10mtd: nand: ecc-hamming: Remove useless includesMiquel Raynal1-1/+0
Most of the includes are simply useless, drop them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-18-miquel.raynal@bootlin.com
2020-12-10mtd: nand: ecc-hamming: Rename the exported functionsMiquel Raynal1-1/+1
Prefix by ecc_sw_hamming_ the functions which should be internal only but are exported for "raw" operations. Prefix by nand_ecc_sw_hamming_ the other functions which will be used in the context of the declaration of an Hamming proper ECC engine object. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-16-miquel.raynal@bootlin.com
2020-12-10mtd: nand: ecc-hamming: Move Hamming code to the generic NAND layerMiquel Raynal1-1/+1
Hamming ECC code might be later re-used by the SPI NAND layer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-12-miquel.raynal@bootlin.com
2020-11-30mtd: nand: ecc-bch: Stop exporting the private structureMiquel Raynal1-1/+1
The NAND BCH control structure has nothing to do outside of this driver, all users of the nand_bch_init/free() functions just save it to chip->ecc.priv so do it in this driver directly and return a regular error code instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-5-miquel.raynal@bootlin.com
2020-11-19mtd: rawnand: fsmc: Move the ECC initialization to ->attach_chip()Miquel Raynal1-15/+15
The probe function is only supposed to initialize the controller hardware but not the ECC engine. Indeed, we don't know anything about the NAND chip(s) at this stage. Let's move the logic initializing the ECC engine, even pretty simple, to the ->attach_chip() hook which gets called during nand_scan() routine, after the NAND chip discovery. As the previously mentioned logic is supposed to parse the DT for us, it is likely that the chip->ecc.* entries be overwritten. So let's avoid this by moving these lines to ->attach_chip(). Fixes: d7157ff49a5b ("mtd: rawnand: Use the ECC framework user input parsing bits") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-09-28mtd: rawnand: Use the new ECC engine type enumerationMiquel Raynal1-6/+6
Mechanical switch from the legacy "mode" enumeration to the new "engine type" enumeration in drivers and board files. The device tree parsing is also updated to return the new enumeration from the old strings. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-11-miquel.raynal@bootlin.com
2020-08-27mtd: rawnand: Rename the ECC algorithm enumeration itemsMiquel Raynal1-1/+1
NAND_ECC_ is not a meaningful prefix, use NAND_ECC_ALGO_ instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-3-miquel.raynal@bootlin.com
2020-06-26mtd: rawnand: s/data_interface/interface_config/Miquel Raynal1-3/+3
The name/suffix data_interface is a bit misleading in that the field or functions actually represent a configuration that can be applied by the controller/chip. Let's rename all fields/functions/hooks that are worth renaming. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-05-31mtd: rawnand: fsmc: Stop using nand_release()Miquel Raynal1-1/+6
This helper is not very useful and very often people get confused: they use nand_release() instead of nand_cleanup(). Let's stop using nand_release() by calling mtd_device_unregister() and nand_cleanup() directly. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-18-miquel.raynal@bootlin.com
2020-05-11mtd: rawnand: Give the possibility to verify a read operation is supportedMiquel Raynal1-1/+1
This can be used to discriminate between two path in the parameter page detection: use data_in cycles (like before) if supported, use the CHANGE READ COLUMN command otherwise. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-9-miquel.raynal@bootlin.com
2020-05-10mtd: rawnand: Take check_only into accountBoris Brezillon1-0/+3
->exec_op() is passed a check_only argument that encodes when the controller should just check whether the operation is supported or not without executing it. Some controllers simply ignore this arguments, others don't but keep modifying some of the registers before returning. Let's fix all those drivers. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200418194217.1016060-1-boris.brezillon@collabora.com
2020-05-10mtd: rawnand: fsmc: Change to non-atomic bit operationsFenghua Yu1-3/+4
No need to use expensive atomic change_bit() on dat[] and err_idx[]: 1. fsmc_bch8_correct_data() is called while mutex chip->lock is held 2. err_idx[] is a local variable. To avoid big endian concern due to type cast to unsigned long, directly change the bit in the specified byte instead of using non-atomic __change_bit(). Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/1576886755-9788-1-git-send-email-fenghua.yu@intel.com
2019-06-27mtd: rawnand: fsmc: Use nand_op_trace for operation tracingSascha Hauer1-17/+2
Replace the different operation tracing functions with a call to nand_op_trace. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-03-04Merge tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtdLinus Torvalds1-0/+16
Pull MTD updates from Boris Brezillon: "Core MTD changes: - Use struct_size() where appropriate - mtd_{read,write}() as wrappers around mtd_{read,write}_oob() - Fix misuse of PTR_ERR() in docg3 - Coding style improvements in mtdcore.c SPI NOR changes: Core changes: - Add support of octal mode I/O transfer - Add a bunch of SPI NOR entries to the flash_info table SPI NOR controller driver changes: - cadence-quadspi: * Add support for Octal SPI controller * write upto 8-bytes data in STIG mode - mtk-quadspi: * rename config to a common one * add SNOR_HWCAPS_READ to spi_nor_hwcaps mask - Add Tudor as SPI-NOR co-maintainer NAND changes: NAND core changes: - Fourth batch of fixes/cleanup to the raw NAND core impacting various controller drivers (Sunxi, Marvell, MTK, TMIO, OMAP2). - Check the return code of nand_reset() and nand_readid_op(). - Remove ->legacy.erase and single_erase(). - Simplify the locking. - Several implicit fall through annotations. Raw NAND controllers drivers changes: - Fix various possible object reference leaks (MTK, JZ4780, Atmel) - ST: * Add support for STM32 FMC2 NAND flash controller - Meson: * Add support for Amlogic NAND flash controller - Denali: * Several cleanup patches - Sunxi: * Several cleanup patches - FSMC: * Disable NAND on remove() * Reset NAND timings on resume() SPI-NAND drivers changes: - Toshiba: * Add support for all Toshiba products. - Macronix: * Fix ECC status read. - Gigadevice: * Add support for GD5F1GQ4UExxG" * tag 'mtd/for-5.1' of git://git.infradead.org/linux-mtd: (64 commits) mtd: spi-nor: Fix wrong abbreviation HWCPAS mtd: spi-nor: cadence-quadspi: fix spelling mistake: "Couldnt't" -> "Couldn't" mtd: spi-nor: Add support for en25qh64 mtd: spi-nor: Add support for MX25V8035F mtd: spi-nor: Add support for EN25Q80A mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller dt-bindings: cadence-quadspi: Add new compatible for AM654 SoC mtd: spi-nor: split s25fl128s into s25fl128s0 and s25fl128s1 mtd: spi-nor: cadence-quadspi: write upto 8-bytes data in STIG mode mtd: spi-nor: Add support for mx25u3235f mtd: rawnand: denali_dt: remove single anonymous clock support mtd: rawnand: mtk: fix possible object reference leak mtd: rawnand: jz4780: fix possible object reference leak mtd: rawnand: atmel: fix possible object reference leak mtd: rawnand: fsmc: Disable NAND on remove() mtd: rawnand: fsmc: Reset NAND timings on resume() mtd: spinand: Add support for GigaDevice GD5F1GQ4UExxG mtd: rawnand: denali: remove unused dma_addr field from denali_nand_info mtd: rawnand: denali: remove unused function argument 'raw' mtd: rawnand: denali: remove unneeded denali_reset_irq() call ...
2019-02-05mtd: rawnand: fsmc: Disable NAND on remove()Linus Walleij1-0/+15
This disables the NAND on remove() and the errorpath, making sure the chipselect gets deasserted when the NAND is not in use. Cc: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-02-05mtd: rawnand: fsmc: Reset NAND timings on resume()Linus Walleij1-0/+1
When we go through a suspend/resume cycle the NAND timings and other settings may have been lost so reset the chip to bring it up in a known working state. The FSMC only supports single CS chips so we only need to call nand_reset(chip, 0). Cc: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-01-15mtd: rawnand: fsmc: Keep bank enable bit setLinus Walleij1-21/+0
Hammering the "bank enable" (PBKEN) bit on and off between every command crashes the Nomadik NHK15 with this message: Scanning device for bad blocks Unhandled fault: external abort on non-linefetch (0x008) at 0xcc95e000 pgd = (ptrval) [cc95e000] *pgd=0b808811, *pte=40000653, *ppte=40000552 Internal error: : 8 [#1] PREEMPT ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.20.0-rc2+ #72 Hardware name: Nomadik STn8815 PC is at fsmc_exec_op+0x194/0x204 (...) After a discussion we (me and Boris Brezillon) start to suspect that this bit does not immediately control the chip select line at all, it rather enables access to the bank and the hardware will drive the CS autonomously. If there is a NAND chip connected, we should keep this enabled. As fsmc_nand_setup() sets this bit, we can simply remove the offending code. Fixes: 550b9fc4e3af ("mtd: rawnand: fsmc: Stop implementing ->select_chip()") Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <bbrezillon@kernel.org>
2018-12-07mtd: rawnand: fsmc: Fix all coding style issues reported by checkpatchBoris Brezillon1-100/+99
checkpatch reports a bunch of coding style issues. Let's fix them all in one step. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Add an SPDX tag to replace the license textBoris Brezillon1-5/+2
Add an SPDX GPL-2.0 tag and update MODULE_LICENSE() to match the license text. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Stop using the dummy controller objBoris Brezillon1-1/+6
The dummy controller is kept around to support old drivers. Let's patch this one and declare our own nand_controller instance. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Make conversion from chip to fsmc consistentBoris Brezillon1-2/+1
nand_to_fsmc() is used almost everywhere except in fsmc_setup_data_interface() where nand_get_controller_data() is used instead. Make that consistent and drop the nand_set_controller_data() call in the probe path. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Fix the fsmc_nand_data kernel-docBoris Brezillon1-3/+4
The kernel-doc describing struct fsmc_nand_data is not in sync with the struct itself. Add missing entries and drop invalid ones. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Stop passing mtd_info objects to internal functionsBoris Brezillon1-28/+23
Mimic what has been done in the core and stop passing mtd_info objects to internal functions. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Move ->setup_data_interface() to nand_controller_opsBoris Brezillon1-3/+4
->setup_data_interface() is a controller specific method and should thus be placed in nand_controller_ops. In order to make that work with controllers that support keeping pre-configured timings we need to add a new NAND_KEEP_TIMINGS flag to inform the core it should skip the timings selection step. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: Move the ->exec_op() method to nand_controller_opsBoris Brezillon1-1/+1
->exec_op() is a controller method and has nothing to do in the nand_chip struct. Let's move it to the nand_controller_ops struct and adjust the core and drivers accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-12-07mtd: rawnand: fsmc: Stop implementing ->select_chip()Boris Brezillon1-11/+12
Now that the CS line to assert is directly passed through the nand_operation struct we can replace the fsmc_select_chip() implementation by an internal fsmc_ce_ctrl() function which is directly called from fsmc_exec_op() Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-11-05mtd: rawnand: fsmc: Fix unchecked return value in fsmc_read_page_hweccGustavo A. R. Silva1-3/+4
Check return value of nand_read_data_op. Notice that, currently, all instances of nand_read_data_op() are being checked, with the exception of two of them in marvell_nand driver, in which the caller function explicitly returns 0 every time. Also, notice that I moved the declaration of *ret* to the top of fsmc_read_page_hwecc(). Addresses-Coverity-ID: 1471968 ("Unchecked return value") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Allow selection of ECC byte ordering at runtimeBoris Brezillon1-0/+1
Currently, the selection of ECC byte ordering for software hamming is done at compilation time, which doesn't make sense when ECC byte calculation is done in hardware and byte ordering is forced by the hardware engine. In this case, only the correction is done in software and we want to force the byte-ordering no matter the value of CONFIG_MTD_NAND_ECC_SMC. This is typically the case for the FSMC (Smart Media ordering), TMIO and TXX9NDFMC (regular byte ordering) blocks. For all other use cases (pure software implementation, SM FTL and nandecctest), we keep selecting the byte ordering based on the CONFIG_MTD_NAND_ECC_SMC value. It might not be ideal for SM FTL (I'd expect Smart Media ordering to be employed by the Smart Media FTL), but this option doesn't seem to be enabled in the existing _defconfig, so I can't tell setting sm_order to true is the right choice. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Deprecate ->chip_delayBoris Brezillon1-1/+0
The wait timeouts and delays are directly extracted from the NAND timings and ->chip_delay is only used in legacy path, so let's move it to the nand_legacy struct to make it clear. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to chip->setup_data_interface()Boris Brezillon1-2/+1
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->setup_data_interface() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to chip->select_chip()Boris Brezillon1-2/+2
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle the chip->select_chip() hook. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to ecc->read_xxx() hooksBoris Brezillon1-3/+3
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. Let's tackle all ecc->read_xxx() hooks at once. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to ecc->correct()Boris Brezillon1-5/+4
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->correct()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to ecc->calculate()Boris Brezillon1-5/+5
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->calculate()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to ecc->hwctl()Boris Brezillon1-3/+3
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one. Now is ecc->hwctl()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to nand_release()Boris Brezillon1-1/+1
Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. Now is nand_release()'s turn. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-10-03mtd: rawnand: Pass a nand_chip object to nand_scan()Boris Brezillon1-1/+1
Let's make the raw NAND API consistent by patching all helpers to take a nand_chip object instead of an mtd_info one. We start with nand_scan(). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-31mtd: rawnand: fsmc: convert driver to nand_scan()Miquel Raynal1-70/+78
Two helpers have been added to the core to do all kind of controller side configuration/initialization between the detection phase and the final NAND scan. Implement these hooks so that we can convert the driver to just use nand_scan() instead of the nand_scan_ident() + nand_scan_tail() pair. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-07-19mtd: rawnand: fsmc: Stop using chip->read_buf()Boris Brezillon1-1/+1
chip->read_buf is left unassigned since commit 4da712e70294 ("mtd: nand: fsmc: use ->exec_op()"), leading to a NULL pointer dereference when it's called from fsmc_read_page_hwecc(). Fix that by using the appropriate helper to read data out of the NAND. Fixes: 4da712e70294 ("mtd: nand: fsmc: use ->exec_op()") Cc: <stable@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: fsmc: Use uintptr_t casts instead of unsigned onesBoris Brezillon1-2/+2
uintptr_t should be used when casting a pointer to an unsigned int so that the code compiles without warnings even on 64-bit architectures. This is needed if we want to allow selection of this driver when COMPILE_TEST=y. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-07-18mtd: rawnand: fscm: Avoid collision on PC def when compiling for MIPSBoris Brezillon1-14/+15
We want to allow this driver to be selected when COMPILE_TEST=y, this means the driver can be compiled for any arch, including MIPS. When compiling this driver for MIPS, we end up with a collision on the 'PC' macro definition (also defined in arch/mips/include/asm/ptrace.h). Prefix the fsmc one with FSMC_ to avoid this problem. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-04-29mtd: rawnand: fsmc: fix the probe function error pathMiquel Raynal1-1/+3
An error after nand_scan_tail() should trigger a nand_cleanup(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
2018-04-29mtd: rawnand: fsmc: clean the probe function styleMiquel Raynal1-12/+13
Before fixing the error path of the probe function, fix the style of the probe function and mostly the goto labels: they should indicate what the next cleanup is, not the point from which they can be accessed. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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