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2021-02-04coresight: etm4x: Hide sysfs attributes for unavailable registersSuzuki K Poulose2-0/+57
2021-02-04coresight: etm4x: Add sysreg access helpersSuzuki K Poulose2-22/+353
2021-02-04coresight: etm4x: Add commentary on the registersSuzuki K Poulose1-8/+13
2021-02-04coresight: etm4x: Make offset available for sysfs attributesSuzuki K Poulose1-58/+57
2021-02-04coresight: etm4x: Convert all register accessesSuzuki K Poulose3-172/+188
2021-02-04coresight: etm4x: Always read the registers on the host CPUSuzuki K Poulose1-13/+10
2021-02-04coresight: Convert claim/disclaim operations to use access wrappersSuzuki K Poulose10-54/+83
2021-02-04coresight: Convert coresight_timeout to use access abstractionSuzuki K Poulose7-29/+46
2021-02-04coresight: tpiu: Prepare for using coresight device access abstractionSuzuki K Poulose1-17/+13
2021-02-04coresight: Introduce device access abstractionSuzuki K Poulose11-0/+53
2021-02-04coresight: etm4x: Skip accessing TRCPDCR in save/restoreSuzuki K Poulose1-5/+7
2021-02-04coresight: etm4x: Handle access to TRCSSPCICRnSuzuki K Poulose2-5/+26
2021-02-04coresight: etm4x: add AMBA id for Cortex-A55 and Cortex-A75Chunyan Zhang1-0/+2
2021-02-04coresight: cti: Reduce scope for the variable 'cs_fwnode' in cti_plat_create_...Markus Elfring1-3/+3
2021-01-21intel_th: pci: Add Alder Lake-P supportAlexander Shishkin1-0/+5
2021-01-21stm class: Fix module init return on allocation failureWang Hui1-2/+4
2020-12-15Merge tag 'char-misc-5.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds16-44/+188
2020-12-15hwtracing: intel: use krealloc_array()Bartosz Golaszewski1-1/+1
2020-12-08coresight: etm4x: Modify core-commit to avoid HiSilicon ETM overflowQi Liu3-0/+114
2020-12-08coresight: remove broken __exit annotationsArnd Bergmann10-16/+16
2020-12-08coresight: tmc-etr: Fix barrier packet insertion for perf bufferSuzuki K Poulose1-1/+1
2020-11-27coresight-stm: Fix W=1 warning in STM driverMathieu Poirier1-1/+1
2020-11-27coresight-tpiu: Fix W=1 warning in TPIU driverMathieu Poirier1-1/+1
2020-11-27coresight: Fix W=1 warnings in core frameworkMathieu Poirier1-1/+7
2020-11-27coresight: tmc-etr: Check if page is valid before dma_map_page()Mao Jinlong1-0/+2
2020-11-27coresight: tmc-etr: Assign boolean values to a bool variableKaixu Xia1-2/+2
2020-11-27coresight: etb10: Fix possible NULL ptr dereference in etb_enable_perf()Sai Prakash Ranjan1-1/+3
2020-11-27coresight: tmc-etf: Fix NULL ptr dereference in tmc_enable_etf_sink_perf()Sai Prakash Ranjan2-1/+5
2020-11-27coresight: Remove unnecessary THIS_MODULE of funnel and replicator driverQi Liu2-2/+2
2020-11-27coresight: etm4x: Handle TRCVIPCSSCTLR accessesSuzuki K Poulose1-4/+7
2020-11-27coresight: etm4x: Fix accesses to TRCPROCSELRSuzuki K Poulose1-4/+6
2020-11-27coresight: etm4x: Update TRCIDR3.NUMPROCS handling to match v4.2Suzuki K Poulose1-2/+7
2020-11-27coresight: etm4x: Fix accesses to TRCCIDCTLR1Suzuki K Poulose1-3/+6
2020-11-27coresight: etm4x: Fix accesses to TRCVMIDCTLR1Suzuki K Poulose1-3/+6
2020-11-27coresight: core: Remove unneeded semicolonZou Wei1-1/+1
2020-11-27coresight: etm4x: Skip setting LPOVERRIDE bit for qcom, skip-power-upSai Prakash Ranjan1-1/+1
2020-10-29coresight: cti: Initialize dynamic sysfs attributesSuzuki K Poulose1-0/+7
2020-10-29coresight: Fix uninitialised pointer bug in etm_setup_aux()Mike Leach1-1/+1
2020-10-29coresight: add module licenseArnd Bergmann1-0/+1
2020-10-05intel_th: pci: Add Alder Lake CPU supportAlexander Shishkin1-0/+5
2020-10-05intel_th: pci: Add Alder Lake-S supportAlexander Shishkin1-0/+5
2020-10-05stm class: ftrace: Use different channel accroding to CPUTingwei Zhang1-1/+4
2020-10-05stm class: ftrace: Enable supported trace export flagTingwei Zhang1-0/+2
2020-10-05stm class: ftrace: Change dependency to TRACINGTingwei Zhang1-1/+1
2020-09-28coresight: etm4x: Fix save and restore of TRCVMIDCCTLR1 registerSai Prakash Ranjan1-2/+2
2020-09-28coresight: core: Allow the coresight core driver to be built as a moduleTingwei Zhang5-15/+48
2020-09-28coresight: catu: Allow catu drivers to be built as modulesTingwei Zhang2-1/+19
2020-09-28coresight: tmc-etr: Add function to register catu opsMian Yousaf Kaukab4-6/+36
2020-09-28coresight: cti: Allow cti to be built as a moduleTingwei Zhang5-5/+28
2020-09-28coresight: cti: Increase reference count when enabling ctiTingwei Zhang1-3/+14