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gpu
Age
Commit message (
Expand
)
Author
Files
Lines
2020-09-07
drm/vc4: crtc: Move the CRTC disable out
Maxime Ripard
1
-12
/
+22
2020-09-07
drm/vc4: hvs: Introduce a function to get the assigned FIFO
Maxime Ripard
2
-0
/
+55
2020-09-07
drm/vc4: hvs: Make the stop_channel function public
Maxime Ripard
2
-1
/
+2
2020-09-07
drm/vc4: crtc: Clear the PixelValve FIFO during configuration
Maxime Ripard
1
-1
/
+1
2020-09-07
drm/vc4: crtc: Clear the PixelValve FIFO on disable
Maxime Ripard
1
-2
/
+1
2020-09-07
drm/vc4: crtc: Add a delay after disabling the PixelValve output
Maxime Ripard
1
-0
/
+18
2020-09-07
drm/vc4: encoder: Add finer-grained encoder callbacks
Maxime Ripard
2
-0
/
+26
2020-09-07
drm/vc4: crtc: Move HVS channel init before the PV initialisation
Maxime Ripard
1
-4
/
+4
2020-09-07
drm/vc4: crtc: Remove redundant pixelvalve reset
Maxime Ripard
1
-1
/
+0
2020-09-07
drm/vc4: crtc: Remove mode_set_nofb
Maxime Ripard
1
-6
/
+1
2020-09-07
drm/vc4: hvs: Make sure our channel is reset
Maxime Ripard
1
-0
/
+4
2020-09-07
drm/vc4: crtc: Move the HVS gamma LUT setup to our init function
Maxime Ripard
4
-47
/
+16
2020-09-07
drm/vc4: crtc: Move HVS init and close to a function
Maxime Ripard
1
-46
/
+58
2020-09-07
drm/vc4: crtc: Move PV dump to config_pv
Maxime Ripard
1
-14
/
+12
2020-09-07
drm/vc4: crtc: Turn pixelvalve reset into a function
Maxime Ripard
1
-7
/
+13
2020-09-07
drm/vc4: crtc: Disable color management for HVS5
Maxime Ripard
2
-7
/
+12
2020-09-07
drm/vc4: crtc: Add HDMI1 encoder type
Maxime Ripard
1
-0
/
+1
2020-09-07
drm/vc4: crtc: Rename HDMI encoder type to HDMI0
Maxime Ripard
3
-3
/
+3
2020-09-07
drm/vc4: crtc: Add function to compute FIFO level bits
Maxime Ripard
1
-2
/
+10
2020-09-07
drm/vc4: crtc: Add FIFO depth to vc4_crtc_data
Maxime Ripard
2
-3
/
+20
2020-09-07
drm/vc4: crtc: Assign output to channel automatically
Maxime Ripard
6
-26
/
+200
2020-09-07
drm/vc4: kms: Convert to for_each_new_crtc_state
Maxime Ripard
1
-4
/
+6
2020-09-07
drm/vc4: crtc: Enable and disable the PV in atomic_enable / disable
Maxime Ripard
1
-3
/
+7
2020-09-07
drm/vc4: crtc: Use local chan variable
Maxime Ripard
1
-1
/
+1
2020-09-07
drm/vc4: crtc: Rename HVS channel to output
Maxime Ripard
4
-8
/
+8
2020-09-07
drm/vc4: crtc: Move the cob allocation outside of bind
Maxime Ripard
2
-20
/
+17
2020-09-07
drm/vc4: crtc: Use a shared interrupt
Maxime Ripard
1
-1
/
+3
2020-09-07
drm/vc4: crtc: Deal with different number of pixel per clock
Maxime Ripard
2
-7
/
+14
2020-09-07
drm/vc4: plane: Create more planes
Maxime Ripard
1
-1
/
+1
2020-09-07
drm/vc4: plane: Optimize the LBM allocation size
Dave Stevenson
1
-4
/
+13
2020-09-07
drm/vc4: plane: Change LBM alignment constraint on LBM
Dave Stevenson
1
-1
/
+3
2020-09-07
drm/vc4: hvs: Boost the core clock during modeset
Maxime Ripard
3
-0
/
+29
2020-09-07
drm/vc4: Add support for the BCM2711 HVS5
Dave Stevenson
4
-59
/
+240
2020-09-07
drm/bridge: dw-mipi-dsi.c: Add VPG runtime config through debugfs
Angelo Ribeiro
1
-8
/
+90
2020-09-07
drm/bridge/synopsys: dsi: add support for non-continuous HS clock
Antonio Borneo
1
-2
/
+7
2020-09-07
drm/bridge/synopsys: dsi: allow sending longer LP commands
Antonio Borneo
1
-8
/
+9
2020-09-07
drm/bridge/synopsys: dsi: allow LP commands in video mode
Antonio Borneo
1
-0
/
+8
2020-09-06
drm/panel: s6e63m0: Fix up DRM_DEV* regression
Linus Walleij
3
-27
/
+17
2020-09-05
drm/panel: s6e63m0: Order enable/disable sequence
Linus Walleij
1
-3
/
+15
2020-09-05
drm/panel: s6e63m0: Add code to identify panel
Linus Walleij
1
-0
/
+60
2020-09-05
drm/panel: s6e63m0: Add reading functionality
Linus Walleij
4
-2
/
+43
2020-09-05
drm/panel: s6e63m0: Add DSI transport
Linus Walleij
6
-3
/
+144
2020-09-05
drm/panel: s6e63m0: Break out SPI transport
Linus Walleij
5
-70
/
+124
2020-09-03
drm/managed: Cleanup of unused functions and polishing docs
Daniel Vetter
2
-58
/
+22
2020-09-03
drm/ttm: remove io_reserve_lru handling v3
Christian König
4
-169
/
+24
2020-09-03
drm/nouveau: move io_reserve_lru handling into the driver v5
Christian König
4
-23
/
+127
2020-09-03
drm/ttm: make sure that we always zero init mem.bus v2
Christian König
1
-0
/
+9
2020-09-02
drm/virtio: drop virtio_gpu_output->enabled
Gerd Hoffmann
3
-6
/
+1
2020-09-02
drm/virtio: fix unblank
Gerd Hoffmann
3
-1
/
+15
2020-09-01
drm/gma500: Constify static structs
Rikard Falkeborn
1
-3
/
+3
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