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path: root/drivers/gpu/drm
AgeCommit message (Expand)AuthorFilesLines
2019-03-08drm/i915: Track the pinned kernel contexts on each engineChris Wilson6-52/+45
2019-03-08drm/i915: Make context pinning part of intel_context_opsChris Wilson7-134/+95
2019-03-08drm/i915: Move over to intel_context_lookup()Chris Wilson21-96/+310
2019-03-08drm/i915: Store the intel_context_ops in the intel_engine_csChris Wilson5-26/+24
2019-03-08drm/i915: Split struct intel_context definition to its own headerChris Wilson18-817/+974
2019-03-08drm/i915: Track active engines within a contextChris Wilson7-29/+43
2019-03-08drm/i915/dp: use single point of truth for PPS divisor registerJani Nikula1-34/+39
2019-03-08drm/i915/dp: deconflate PPS unlock from divisor registerJani Nikula1-3/+4
2019-03-08drm/i915: Remove has-kernel-contextChris Wilson5-78/+4
2019-03-08drm/i915: Reduce presumption of request ordering for barriersChris Wilson10-72/+27
2019-03-08drm/i915: Refactor common code to load initial power contextChris Wilson1-24/+24
2019-03-08drm/i915: Do a synchronous switch-to-kernel-context on idlingChris Wilson5-110/+73
2019-03-08drm/i915/selftests: Check preemption support on each engineChris Wilson1-0/+18
2019-03-08drm/i915/icl: Prevent incorrect DBuf enablingImre Deak2-3/+16
2019-03-07drm/i915/selftests: Improve switch-to-kernel-context checkingChris Wilson1-45/+35
2019-03-07drm/i915: Read out memory typeVille Syrjälä3-4/+100
2019-03-07drm/i915: Extract DIMM info on cnl+Ville Syrjälä2-15/+68
2019-03-07drm/i915: Clean up intel_get_dram_info() a bitVille Syrjälä1-12/+4
2019-03-07drm/i914: s/l_info/dimm_l/ etc.Ville Syrjälä2-10/+10
2019-03-07drm/i915: Generalize intel_is_dram_symmetric()Ville Syrjälä1-16/+12
2019-03-07drm/i915: Use dram_dimm_info moreVille Syrjälä1-20/+24
2019-03-07drm/i915: Extract DIMM info on GLK tooVille Syrjälä1-2/+2
2019-03-07drm/i915: Fix DRAM size reporting for BXTVille Syrjälä2-11/+16
2019-03-07drm/i915: Extract BXT DIMM helpersVille Syrjälä1-31/+63
2019-03-07drm/i915: Polish skl_is_16gb_dimm()Ville Syrjälä2-19/+17
2019-03-07drm/i915: Extract functions to derive SKL+ DIMM infoVille Syrjälä1-25/+38
2019-03-07drm/i915: Store DIMM rank information as a numberVille Syrjälä2-58/+45
2019-03-07drm/i915/icl: Remove alpha support protectionJosé Roberto de Souza1-1/+0
2019-03-07drm/i915: Force GPU idle on suspendChris Wilson1-15/+5
2019-03-07drm/i915: Make I915_GEM_IDLE_TIMEOUT into a macroChris Wilson2-1/+5
2019-03-06drm/i915: Populate pipe_offsets[] & co. accuratelyVille Syrjälä1-42/+104
2019-03-06drm/i915: Simplify i830 DVO 2x clock handlingVille Syrjälä1-46/+14
2019-03-06drm/i915: Do not temporarily disable the DPLL on i830Ville Syrjälä1-2/+1
2019-03-06drm/i915: Relax mmap VMA checkTvrtko Ursulin1-1/+2
2019-03-06drm/i915/selftests: Upgrade printing test/subtest name to pr_infoMichał Winiarski1-2/+2
2019-03-06drm/i915/selftests: Fix MI_STORE_DWORD_IMM alignmentChris Wilson1-1/+1
2019-03-06drm/i915: Pass around the intel_contextChris Wilson3-37/+38
2019-03-06drm/i915: Use i915_global_register()Chris Wilson14-134/+171
2019-03-05drm/i915/icl: Default to Thread Group preemption for compute workloadsMichał Winiarski1-2/+7
2019-03-05drm/i915: Move find_active_request() to the engineChris Wilson5-50/+50
2019-03-05drm/i915/gtt: Mark ALL_ENGINES as dirty on ppGTT modificationChris Wilson1-2/+3
2019-03-05drm/i915: Store the BIT(engine->id) as the engine's maskChris Wilson45-432/+422
2019-03-05drm/i915: Remove last traces of exec-id (GEM_BUSY)Chris Wilson3-26/+17
2019-03-05drm/i915: Stop capturing semaphore registers for gen6/7 GPU hangsChris Wilson2-24/+2
2019-03-05drm/i915: Just check the vebox IIR regardlessChris Wilson1-6/+4
2019-03-05drm/i915/gtt: Store scratch page size alongside not in the common structChris Wilson2-6/+7
2019-03-05drm/i915/gtt: Use optimised memset32/64 for clearing PTEChris Wilson1-9/+3
2019-03-04drm/i915: Fix bit name in PP_STATUS registerLucas De Marchi1-1/+1
2019-03-04drm/i915: allow platforms without eDP transcoderLucas De Marchi3-4/+8
2019-03-04drm/i915: refactor transcoders reporting on error stateLucas De Marchi1-9/+12
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