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path:
root
/
drivers
/
gpu
/
drm
/
tegra
/
dsi.c
Age
Commit message (
Expand
)
Author
Files
Lines
2015-01-27
drm/tegra: dc: Unify enabling the display controller
Thierry Reding
1
-10
/
+0
2015-01-27
drm/tegra: Remove unused ->mode_fixup() callbacks
Thierry Reding
1
-87
/
+0
2015-01-27
drm/tegra: dsi: Implement ->atomic_check()
Thierry Reding
1
-73
/
+196
2015-01-27
drm/tegra: Atomic conversion, phase 2
Thierry Reding
1
-0
/
+2
2015-01-27
drm/tegra: Atomic conversion, phase 1
Thierry Reding
1
-0
/
+2
2015-01-27
drm/tegra: Output cleanup functions cannot fail
Thierry Reding
1
-5
/
+1
2015-01-27
drm/tegra: Remove remnants of the output midlayer
Thierry Reding
1
-4
/
+8
2015-01-27
drm/tegra: debugfs cleanup cannot fail
Thierry Reding
1
-9
/
+3
2015-01-27
drm/tegra: dsi: Demidlayer
Thierry Reding
1
-163
/
+195
2015-01-27
drm/tegra: Stop CRTC at CRTC disable time
Thierry Reding
1
-4
/
+0
2015-01-27
drm/tegra: Use tegra_commit_dc() in output drivers
Thierry Reding
1
-4
/
+2
2015-01-27
drm/tegra: dsi: Reset across ->exit()/->init()
Thierry Reding
1
-13
/
+14
2015-01-27
drm/tegra: dsi: Soft-reset controller on ->disable
Thierry Reding
1
-0
/
+25
2015-01-27
drm/tegra: dsi: Registers are 32-bit
Thierry Reding
1
-7
/
+7
2014-11-13
drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlier
Sean Paul
1
-4
/
+7
2014-11-13
drm/tegra: dsi: Replace 1000000 by USEC_PER_SEC
Thierry Reding
1
-1
/
+1
2014-11-13
drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SEC
Thierry Reding
1
-1
/
+1
2014-11-13
drm/tegra: dsi: Implement host transfers
Thierry Reding
1
-0
/
+267
2014-11-13
drm/tegra: dsi: Add ganged mode support
Thierry Reding
1
-29
/
+192
2014-11-13
drm/tegra: dsi: Split out tegra_dsi_set_timeout()
Thierry Reding
1
-15
/
+23
2014-11-13
drm/tegra: dsi: Add command mode support
Thierry Reding
1
-19
/
+63
2014-11-13
drm/tegra: dsi: Refactor in preparation for command mode
Thierry Reding
1
-19
/
+81
2014-11-13
drm/tegra: dsi: Properly cleanup on probe failure
Thierry Reding
1
-15
/
+37
2014-11-13
drm/tegra: dsi: Mark connector hotpluggable
Thierry Reding
1
-2
/
+4
2014-11-13
drm/tegra: dsi: Leave parent clock alone
Thierry Reding
1
-7
/
+0
2014-11-13
drm/tegra: dsi: Do not manage clock on enable/disable
Thierry Reding
1
-15
/
+14
2014-11-13
drm/tegra: dsi: Make FIFO depths host parameters
Thierry Reding
1
-4
/
+6
2014-08-04
drm/tegra: add MODULE_DEVICE_TABLEs
Stephen Warren
1
-0
/
+1
2014-08-04
drm/tegra: dsi - Handle non-continuous clock flag
Alexandre Courbot
1
-1
/
+2
2014-06-05
drm/tegra: Remove host1x drm_bus implementation
Thierry Reding
1
-3
/
+3
2014-06-05
drm/tegra: dsi - Do not needlessly recompute pclk
Thierry Reding
1
-1
/
+0
2014-06-05
drm/tegra: dc - Compute shift clock divider in output drivers
Thierry Reding
1
-12
/
+31
2014-06-05
drm/tegra: dsi - Reset controller on driver unload
Thierry Reding
1
-0
/
+1
2014-06-05
drm/tegra: dsi - Fix typo when disabling controller
Thierry Reding
1
-1
/
+1
2014-06-05
drm/tegra: dsi - Add enable guard
Thierry Reding
1
-0
/
+11
2014-06-05
drm/tegra: dsi - Initialize proper packet sequences
Thierry Reding
1
-4
/
+46
2014-06-05
drm/tegra: dsi - Implement VDD supply support
Thierry Reding
1
-0
/
+17
2014-06-05
drm/tegra: dsi - Remove unneeded code
Thierry Reding
1
-85
/
+0
2014-06-05
drm/tegra: dsi - Use internal pixel format
Thierry Reding
1
-1
/
+33
2014-04-04
drm/tegra: Relicense under GPL v2
Thierry Reding
1
-17
/
+3
2013-12-20
drm/tegra: Relocate some output-specific code
Thierry Reding
1
-7
/
+15
2013-12-20
drm/tegra: Fix return value check
Wei Yongjun
1
-2
/
+2
2013-12-20
drm/tegra: Add DSI support
Thierry Reding
1
-0
/
+963