summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/nouveau/nva3_pm.c
AgeCommit message (Expand)AuthorFilesLines
2013-11-08drm/nouveau/drm/pm: remove everything except the hwmon interfaces to THERMBen Skeggs1-624/+0
2013-07-01drm/nouveau/fb: initialise vram controller as pfb sub-objectBen Skeggs1-2/+2
2012-10-03Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds1-125/+149
2012-10-03drm/nouveau: port remainder of drm code, and rip out compat layerBen Skeggs1-123/+149
2012-10-03drm/nouveau/fb: merge fb/vram and port to subdev interfacesBen Skeggs1-4/+2
2012-10-03drm/nouveau/clock: pull in the implementation from all over the placeBen Skeggs1-1/+1
2012-10-03drm/nouveau: restructure source tree, split core from drm implementationBen Skeggs1-1/+1
2012-10-02UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/David Howells1-1/+1
2012-05-24drm/nouveau/pm: some more delays for ddr3 reclockingBen Skeggs1-0/+1
2012-05-24drm/nva3/pm: another few magic regs, and slightly better 0x004018 handlingBen Skeggs1-4/+15
2012-05-24drm/nva3/pm: initial attempt at handling 111100/111104Ben Skeggs1-0/+21
2012-05-24drm/nva3/pm: make pll->pll mode workBen Skeggs1-6/+21
2012-05-24drm/nva3/pm: attempt to bash a few 0x100200 bits correctlyBen Skeggs1-20/+46
2012-05-24drm/nva3/pm: begin to restructure memory clock changes + another magicBen Skeggs1-8/+40
2012-05-24drm/nva3/pm: more random unknown PFB regsBen Skeggs1-1/+23
2012-05-24drm/nva3/pm: initial attempt at more magic PFB regsBen Skeggs1-1/+24
2012-05-24drm/nva3/pm: hook up to ram reclocking helperBen Skeggs1-12/+110
2012-05-24drm/nva3/pm: introduce more paranoiaBen Skeggs1-5/+10
2011-12-21drm/nouveau/pm: make clocks_set return an error code clocks_set can fail.Martin Peres1-1/+5
2011-09-20drm/nva3/pm: fixup for NVAF specialBen Skeggs1-1/+7
2011-09-20drm/nva3/pm: use crystal freq where appropriateBen Skeggs1-3/+4
2011-09-20drm/nva3/pm: pll disabled if bit 0 of ctrl not setBen Skeggs1-19/+23
2011-09-20drm/nvc0/pm: more complete parsing of clock domainsBen Skeggs1-0/+2
2011-09-20drm/nva3/pm: idle graphics engine before changing clocksBen Skeggs1-0/+40
2011-09-20drm/nva3/pm: tidy and add some comments here and thereBen Skeggs1-47/+78
2011-09-20drm/nva3/pm: parse/reclock vdec/41a0 clocksBen Skeggs1-0/+20
2011-09-20drm/nva3/pm: rewrite clock_set, and switch to new interfacesBen Skeggs1-136/+141
2011-09-20drm/nva3/pm: rewrite clock readback functions, far more correct nowBen Skeggs1-33/+62
2011-05-16drm/nva3/clk: better pll calculation when no fractional fb div availableBen Skeggs1-2/+2
2011-05-16drm/nva3/pm: allow use of divisor 16Ben Skeggs1-1/+1
2011-05-16drm/nva3/pm: initial pass at set_clock() hookBen Skeggs1-21/+94
2011-05-16drm/nva3: somewhat improve clock reportingBen Skeggs1-10/+46
2010-10-05drm/nva3: split pm backend out from nv50Ben Skeggs1-0/+95