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path: root/drivers/gpu/drm/msm/dsi/dsi.xml.h
AgeCommit message (Expand)AuthorFilesLines
2021-08-10drm/msm/dsi: add continuous clock support for 7nm PHYDmitry Baryshkov1-0/+1
2021-08-07drm/msm/dsi: update dsi register header file for tpgAbhinav Kumar1-0/+73
2021-06-23drm/msm: Generated register updateRob Clark1-1700/+22
2020-09-12drm/msm/dsi: add support for 7nm DSI PHY/PLLJonathan Marek1-0/+423
2020-07-31drm/msm: sync generated headersRob Clark1-35/+195
2018-08-10drm/msm: update generated headersRob Clark1-2/+11
2018-02-20drm/msm/dsi: Update generated headers for 10nm PLL/PHYArchit Taneja1-13/+174
2017-06-16drm/msm: update generated headersRob Clark1-2/+11
2017-02-06drm/msm/dsi: Update generated headersArchit Taneja1-13/+256
2016-11-28drm/msm: update generated headersRob Clark1-1/+1
2016-03-03drm/msm: update generated headersRob Clark1-2/+3
2015-10-22drm/msm: update generated headersRob Clark1-59/+179
2015-08-15drm/msm: update generated headersRob Clark1-11/+200
2015-06-11drm/msm: update generated headersRob Clark1-2/+161
2015-04-01drm/msm/dsi: Update generated DSI header fileHai Li1-42/+376
2015-02-01drm/msm: update generated headersRob Clark1-5/+6
2014-11-16drm/msm: update generated headersRob Clark1-4/+4
2014-09-10drm/msm: update generated headersRob Clark1-5/+5
2014-08-04drm/msm: update generated headersRob Clark1-2/+2
2014-01-09drm/msm: resync generated headersRob Clark1-3/+5
2013-11-01drm/msm: resync generated headersRob Clark1-3/+3
2013-08-24drm/msm: add register definitionsRob Clark1-0/+502
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