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path: root/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.h
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2022-02-25drm/msm: Avoid dirtyfb stalls on video mode displays (v2)Rob Clark1-0/+5
Someone on IRC once asked an innocent enough sounding question: Why with xf86-video-modesetting is es2gears limited at 120fps. So I broke out the perfetto tracing mesa MR and took a look. It turns out the problem was drm_atomic_helper_dirtyfb(), which would end up waiting for vblank.. es2gears would rapidly push two frames to Xorg, which would blit them to screen and in idle hook (I assume) call the DIRTYFB ioctl. Which in turn would do an atomic update to flush the dirty rects, which would stall until the next vblank. And then the whole process would repeat. But this is a bit silly, we only need dirtyfb for command mode DSI panels. So track in plane state whether dirtyfb is required, and track in the fb how many attached planes require dirtyfb so that we can skip it when not required. (Note, mdp4 does not actually have cmd mode support.) Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220223191118.881321-1-robdclark@gmail.com Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-06-23Revert "drm/msm/mdp5: provide dynamic bandwidth management"Rob Clark1-12/+0
This reverts commit c1d12c19efd91b9cda5472bc4ec48854e67c24a8. Breaks armv7 build ERROR: modpost: "__aeabi_ldivmod" [drivers/gpu/drm/msm/msm.ko] undefined! Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-06-23drm/msm/mdp5: provide dynamic bandwidth managementDmitry Baryshkov1-0/+12
Instead of using static bandwidth setup, manage bandwidth dynamically, depending on the amount of allocated planes, their format and resolution. Co-developed-with: James Willcox <jwillcox@squareup.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210525131316.3117809-8-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-06-23drm/msm/mdp5: switch to standard zpos propertyDmitry Baryshkov1-3/+0
Instead of implemeting zpos property on our own, use standard zpos property support. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210525131316.3117809-6-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-06-23drm/msm/mdp5: use drm_plane_state for pixel blend modeDmitry Baryshkov1-1/+0
Use drm_plane_state's 'pixel_blend_mode' field rather than using 'premultiplied' field to mdp5_plane_state. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210525131316.3117809-4-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-06-23drm/msm/mdp5: use drm_plane_state for storing alpha valueDmitry Baryshkov1-1/+0
Use drm_plane_state's 'alpha' field rather than adding extra 'alpha' field to mdp5_plane_state. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210525131316.3117809-3-dmitry.baryshkov@linaro.org Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-11-02drm/msm/mdp5: Add optional TBU and TBU_RT clocksAngeloGioacchino Del Regno1-0/+2
Some SoCs, like MSM8956/8976 (and APQ variants), do feature these clocks and we need to enable them in order to get both of the hw (mdp5/rot) Translation Buffer Units (TBUs) to properly work. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234Thomas Gleixner1-12/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 503 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Enrico Weigelt <info@metux.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190602204653.811534538@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-06-03drm/msm: Don't subclass drm_atomic_state anymoreArchit Taneja1-22/+0
With the addition of "private_objs" in drm_atomic_state, we no longer need to subclass drm_atomic_state to store state of share resources that don't perfectly fit within planes/crtc/connector state information. We can now save this state within drm_atomic_state itself using the private objects. Remove the infrastructure that allowed subclassing of drm_atomic_state in the driver. Changes in v3: - Added to the msm atomic helper patch set Changes in v4: - None Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-06-03drm/msm/mdp5: Add global state as a private atomic objectArchit Taneja1-0/+25
Global shared resources (hwpipes, hwmixers and SMP) for MDP5 are implemented as a part of atomic state by subclassing drm_atomic_state. The preferred approach is to use the drm_private_obj infrastructure available in the atomic core. mdp5_global_state is introduced as a drm atomic private object. The two funcs mdp5_get_global_state() and mdp5_get_existing_global_state() are the two variants that will be used to access mdp5_global_state. This will replace the existing mdp5_state struct (which subclasses drm_atomic_state) and the funcs around it. These will be removed later once we mdp5_global_state is put to use everywhere. Changes in v3: - Added glob_state_lock instead of pushing it into the core - Added to the msm atomic helper patch set Changes in v4: - None Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Sean Paul <seanpaul@chromium.org>
2018-03-19drm/msm/mdp5: rework CTL START signal handlingRob Clark1-0/+8
For DSI cmd-mode and writeback, we need to write the CTL's START register to kick things off, but we only want to do that once both the encoder and the crtc have a chance to write their corresponding flush bits. The difficulty is that when there is a full modeset (ie. encoder state has changed) we want to defer the start until encoder->enable(). But if only plane's have changed, we want to do this from crtc->commit(). The start_mask was a previous attempt to handle this, but it didn't really do the right thing since atomic conversion. Instead track in the crtc state that the start should be deferred, set to try from encoder's (or in future writeback's) atomic_check(). This way the state is part of the atomic state, and rollback can work properly if an atomic test fails. Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-03-19drm/msm: rename mdp->dispRob Clark1-0/+325
Since new display controller is called "dpu" instead of "mdp". Lets make the name of the toplevel directory for the display controllers a bit more generic. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Sean Paul <seanpaul@chromium.org>