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2022-03-04drm/msm: Update generated headersRob Clark1-15/+15
Update headers from mesa commit: commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef Author: Rob Clark <robclark@freedesktop.org> AuthorDate: Wed Mar 2 17:11:10 2022 -0800 freedreno/registers: Add a couple regs we need for kernel Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221> Signed-off-by: Rob Clark <robdclark@chromium.org> [for display bits:] Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20220304005317.776110-2-robdclark@gmail.com
2021-06-23drm/msm: Generated register updateRob Clark1-20/+20
Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31drm/msm: sync generated headersRob Clark1-39/+63
We haven't sync'd for a while.. pull in updates to get definitions for some fields in pkt7 payloads. Signed-off-by: Rob Clark <robdclark@chromium.org> Acked-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2018-12-11drm/msm: update generated headersRob Clark1-5/+5
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-10-07drm/msm: update generated headersRob Clark1-4/+4
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-08-10drm/msm: update generated headersRob Clark1-11/+13
Resync generated headers to pull in a6xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2017-06-16drm/msm: update generated headersRob Clark1-11/+11
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-11-28drm/msm: update generated headersRob Clark1-20/+18
Pull in a5xx registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-03drm/msm: update generated headersRob Clark1-65/+428
Pull in additional regs needed for a430, etc. Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-10-22drm/msm: update generated headersRob Clark1-5/+22
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-08-15drm/msm: update generated headersRob Clark1-9/+24
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-06-11drm/msm: update generated headersRob Clark1-12/+156
Signed-off-by: Rob Clark <robdclark@gmail.com>
2015-02-01drm/msm: update generated headersRob Clark1-106/+142
Resync from rnndb database, to pull in register defines for: * eDP * HDMI/HDCP * mdp4/mdp5 YUV support * mdp5 hw cursor support Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-11-16drm/msm: update generated headersRob Clark1-26/+221
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-09-10drm/msm: update generated headersRob Clark1-6/+6
In particular, pick up the definitions for a handful of LVDS related registers. Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-08-04drm/msm: update generated headersRob Clark1-51/+245
Signed-off-by: Rob Clark <robdclark@gmail.com>
2014-01-09drm/msm: resync generated headersRob Clark1-36/+80
resync to latest envytools db, add mdp5 registers Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-11-01drm/msm: resync generated headersRob Clark1-12/+34
resync to latest envytools db, fixes a typo: s/mpd4/mdp4/ Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: David Brown <davidb@codeaurora.org>
2013-08-24drm/msm: add register definitions for gpuRob Clark1-0/+2193
Generated from rnndb files in: https://github.com/freedreno/envytools Keep this split out as a separate commit to make it easier to review the actual driver. Signed-off-by: Rob Clark <robdclark@gmail.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-20 11:25:37 +0000