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path: root/drivers/gpu/drm/mediatek
AgeCommit message (Expand)AuthorFilesLines
2018-08-27drm/mediatek: fix connection from RDMA2 to DSI1Stu Hsieh1-1/+1
2018-08-27drm/mediatek: update some variable name from ovl to compStu Hsieh2-14/+14
2018-08-27drm/mediatek: use layer_nr function to get layer number to init planeStu Hsieh2-8/+14
2018-08-27drm/mediatek: add function to return RDMA layer numberStu Hsieh1-0/+6
2018-08-27drm/mediatek: add function to return OVL layer numberStu Hsieh1-0/+6
2018-08-27drm/mediatek: add function to get layer number for componentStu Hsieh1-0/+9
2018-08-27drm/mediatek: add YUYV/UYVY color format support for RDMAStu Hsieh1-0/+20
2018-08-27drm/mediatek: add the comment about color format setting for OVLStu Hsieh1-0/+5
2018-08-27drm/mediatek: add RGB color format support for RDMAStu Hsieh1-0/+45
2018-08-27drm/mediatek: add memory mode and layer_config for RDMAStu Hsieh1-0/+21
2018-08-27drm/mediatek: add connection from RDMA2 to DSI0Stu Hsieh1-0/+4
2018-08-27drm/mediatek: add connection from RDMA1 to DSI0Stu Hsieh1-0/+4
2018-08-27drm/mediatek: add connection from RDMA0 to DSI1Stu Hsieh1-0/+4
2018-08-27drm/mediatek: add connection from RDMA0 to DPI1Stu Hsieh1-0/+4
2018-08-27drm/mediatek: Replace drm_dev_unref with drm_dev_putThomas Zimmermann1-3/+3
2018-08-27drm/mediatek: Convert drm_atomic_helper_suspend/resume()Souptick Joarder1-13/+8
2018-08-18Merge tag 'char-misc-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-0/+1
2018-07-20Merge tag 'drm-misc-next-2018-07-18' of git://anongit.freedesktop.org/drm/drm...Dave Airlie2-3/+3
2018-07-13drm: drop _mode_ from drm_mode_connector_attach_encoderDaniel Vetter2-2/+2
2018-07-13drm: drop _mode_ from update_edit_property()Daniel Vetter1-1/+1
2018-07-07headers: separate linux/mod_devicetable.h from linux/platform_device.hRandy Dunlap1-0/+1
2018-06-28drm/mtk: mtk_drm_fb -> drm_framebufferDaniel Stone1-26/+14
2018-06-28drm/mtk: Move GEM BO to drm_framebufferDaniel Stone3-35/+6
2018-06-28drm/mtk: Remove impossible internal errorDaniel Stone1-5/+0
2018-06-28drm/mediatek: Add support for mediatek SOC MT2712stu.hsieh@mediatek.com2-0/+78
2018-06-28drm/mediatek: Split line to not over 80 charactersCK Hu1-18/+36
2018-06-24drm/mediatek: add third ddp pathstu.hsieh@mediatek.com3-1/+12
2018-06-24drm/mediatek: add DSI3 support for mutexstu.hsieh@mediatek.com1-0/+5
2018-06-24drm/mediatek: add DSI2 support for mutexstu.hsieh@mediatek.com1-0/+5
2018-06-24drm/mediatek: add DPI1 support for mutexstu.hsieh@mediatek.com1-0/+5
2018-06-24drm/mediatek: add connection from RDMA2 to DSI3stu.hsieh@mediatek.com1-0/+8
2018-06-24drm/mediatek: add connection from RDMA2 to DSI2stu.hsieh@mediatek.com1-0/+8
2018-06-24drm/mediatek: add connection from RDMA2 to DSI1stu.hsieh@mediatek.com1-0/+8
2018-06-24drm/mediatek: add connection from RDMA2 to DPI1stu.hsieh@mediatek.com1-0/+8
2018-06-24drm/mediatek: add connection from RDMA2 to DPI0stu.hsieh@mediatek.com1-0/+9
2018-06-24drm/mediatek: add connection from RDMA1 to DSI3stu.hsieh@mediatek.com1-0/+8
2018-06-24drm/mediatek: add connection from RDMA1 to DSI2stu.hsieh@mediatek.com1-0/+9
2018-06-24drm/mediatek: add connection from RDMA1 to DSI1stu.hsieh@mediatek.com1-0/+9
2018-06-24drm/mediatek: add connection from RDMA1 to DPI1stu.hsieh@mediatek.com1-0/+8
2018-06-24drm/mediatek: add connection from RDMA0 to DSI3stu.hsieh@mediatek.com1-0/+4
2018-06-24drm/mediatek: add connection from RDMA0 to DSI2stu.hsieh@mediatek.com1-0/+4
2018-06-24drm/mediatek: add connection from RDMA0 to DPI0stu.hsieh@mediatek.com1-0/+5
2018-06-24drm/mediatek: Update the definition of connection from RDMA1 to DPI0stu.hsieh@mediatek.com1-4/+4
2018-06-24drm/mediatek: add connection from OD1 to RDMA1stu.hsieh@mediatek.com1-0/+4
2018-06-24drm/mediatek: add the DSI1 for component init conditionstu.hsieh@mediatek.com1-0/+1
2018-06-24drm/mediatek: add component DSI3stu.hsieh@mediatek.com2-0/+3
2018-06-24drm/mediatek: add component DSI2stu.hsieh@mediatek.com2-0/+3
2018-06-24drm/mediatek: add component DPI1stu.hsieh@mediatek.com2-0/+3
2018-06-24drm/mediatek: add ddp component PWM2stu.hsieh@mediatek.com2-0/+2
2018-06-24drm/mediatek: add ddp component PWM1stu.hsieh@mediatek.com1-0/+1
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