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path:
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/
drivers
/
gpu
/
drm
/
mediatek
/
mtk_drm_ddp_comp.h
Age
Commit message (
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Author
Files
Lines
2020-11-28
soc / drm: mediatek: Move DDP component defines into mtk-mmsys.h
Yongqiang Niu
1
-33
/
+1
2020-08-28
drm/mediatek: dpi/dsi: Change the getting possible_crtc way
Stu Hsieh
1
-0
/
+2
2020-01-10
drm/mediatek: Add ctm property support
Yongqiang Niu
1
-0
/
+9
2020-01-09
drm/mediatek: support CMDQ interface in ddp component
Bibby Hsieh
1
-9
/
+22
2019-12-20
drm/mediatek: remove unused external function
Bibby Hsieh
1
-16
/
+0
2019-11-06
drm/mediatek: Plumb supported rotation values from components to plane init
Sean Paul
1
-0
/
+10
2019-11-06
drm/mediatek: Add plumbing for layer_check hook
Sean Paul
1
-0
/
+12
2019-10-09
drm/mediatek: add function to background color input select for ovl/ovl_2l di...
Yongqiang Niu
1
-0
/
+14
2019-10-09
drm/mediatek: add component OVL_2L1
Yongqiang Niu
1
-0
/
+1
2019-10-09
drm/mediatek: add component OVL_2L0
Yongqiang Niu
1
-0
/
+2
2019-10-09
drm/mediatek: add component DITHER
Yongqiang Niu
1
-0
/
+2
2019-10-09
drm/mediatek: add ddp component CCORR
Yongqiang Niu
1
-0
/
+2
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174
Thomas Gleixner
1
-9
/
+1
2018-08-27
drm/mediatek: add function to get layer number for component
Stu Hsieh
1
-0
/
+9
2018-06-24
drm/mediatek: add component DSI3
stu.hsieh@mediatek.com
1
-0
/
+1
2018-06-24
drm/mediatek: add component DSI2
stu.hsieh@mediatek.com
1
-0
/
+1
2018-06-24
drm/mediatek: add component DPI1
stu.hsieh@mediatek.com
1
-0
/
+1
2018-06-24
drm/mediatek: add ddp component PWM2
stu.hsieh@mediatek.com
1
-0
/
+1
2018-06-24
drm/mediatek: add ddp component OD1
stu.hsieh@mediatek.com
1
-1
/
+2
2018-06-24
drm/mediatek: add ddp component AAL1
stu.hsieh@mediatek.com
1
-1
/
+2
2017-04-08
drm/mediatek: add BLS component
yt.shen@mediatek.com
1
-0
/
+2
2016-08-11
drm/mediatek: set mt8173 dithering function
Bibby Hsieh
1
-3
/
+5
2016-08-11
drm/mediatek: Add gamma correction.
Bibby Hsieh
1
-0
/
+10
2016-05-06
drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.
CK Hu
1
-0
/
+150