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path: root/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c
AgeCommit message (Expand)AuthorFilesLines
2019-05-28drm/i915: Move more GEM objects under gem/Chris Wilson1-397/+0
2019-05-28drm/i915: Move GEM domain management to its own fileChris Wilson1-4/+4
2019-04-24drm/i915: Pass intel_context to i915_request_create()Chris Wilson1-1/+1
2019-03-05drm/i915: Store the BIT(engine->id) as the engine's maskChris Wilson1-2/+2
2019-02-20drm/i915: Beware temporary wedging when determining -EIOChris Wilson1-2/+2
2019-01-14drm/i915/selftests: Mark up rpm wakerefsChris Wilson1-2/+3
2019-01-14drm/i915: Markup paired operations on wakerefsChris Wilson1-1/+1
2018-09-20drm/i915/selftests: Live tests emit requests and so require rpmChris Wilson1-0/+2
2018-07-30drm/i915/selftests: Replace opencoded clflush with drm_clflush_virt_rangeChris Wilson1-21/+17
2018-07-06drm/i915/selftests: Provide full mb() around clflushChris Wilson1-3/+18
2018-07-06drm/i915: Start returning an error from i915_vma_move_to_active()Chris Wilson1-2/+2
2018-07-06drm/i915: Refactor export_fence() after i915_vma_move_to_active()Chris Wilson1-4/+0
2018-07-06drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUALChris Wilson1-2/+2
2018-07-06drm/i915/selftests: Skip using the GPU if wedgedChris Wilson1-1/+9
2018-06-14drm/i915: Make closing request flush mandatoryChris Wilson1-2/+2
2018-02-21drm/i915: Rename drm_i915_gem_request to i915_requestChris Wilson1-4/+4
2017-11-15drm/i915/selftests: Markup __iomem for igt_gem_coherencyChris Wilson1-8/+8
2017-08-18drm/i915: Don't use MI_STORE_DWORD_IMM on Sandybridge/vcsChris Wilson1-1/+1
2017-04-12drm/i915: Treat WC a separate cache domainChris Wilson1-8/+2
2017-04-12drm/i915: Combine write_domain flushes to a single functionChris Wilson1-2/+2
2017-02-14drm/i915: Silence compiler warning for seltests/i915_gem_coherencyChris Wilson1-1/+1
2017-02-14drm/i915: Emit to ringbuffer directlyTvrtko Ursulin1-16/+17
2017-02-13drm/i915: Test coherency of and barriers between cache domainsChris Wilson1-0/+384
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