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path: root/drivers/gpu/drm/i915/intel_pm.c
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2017-01-04Merge tag 'drm-misc-next-2016-12-30' of git://anongit.freedesktop.org/git/drm...Daniel Vetter1-30/+37
2017-01-03drm/i915: Update comment in vlv_set_rps_idle()Chris Wilson1-2/+12
2016-12-22drm/i915: Disable L2 cache clock gating on 830 when using the overlayVille Syrjälä1-2/+0
2016-12-18drm/i915: Unify active context tracking between legacy/execlists/gucChris Wilson1-1/+1
2016-12-15drm: Nuke fb->pixel_formatVille Syrjälä1-5/+5
2016-12-15drm: Replace drm_format_plane_cpp() with fb->format->cpp[]Ville Syrjälä1-21/+21
2016-12-15drm/i915: Eliminate the ugly 'fb?:' constructs from the ilk/skl wm codeVille Syrjälä1-8/+15
2016-12-08drm/i915/gen9: Fix PCODE polling during SAGV disablingImre Deak1-25/+9
2016-12-08drm/i915/gen9: Fix PCODE polling during CDCLK change notificationImre Deak1-0/+75
2016-12-08Merge tag 'drm-intel-next-fixes-2016-12-07' of git://anongit.freedesktop.org/...Dave Airlie1-7/+7
2016-12-07drm/i915/skl+: change WM calc to fixed point 16.16Mahesh Kumar1-29/+40
2016-12-07drm/i915/kbl: IPC workaround for kabylakeMahesh Kumar1-0/+4
2016-12-07drm/i915/bxt: IPC WA for BroxtonMahesh Kumar1-2/+11
2016-12-07drm/i915/skl: Add variables to check x_tile and y_tileMahesh Kumar1-10/+12
2016-12-07drm/i915: Protect DSPARB registers with a spinlockVille Syrjälä1-0/+6
2016-12-07drm/i915: rename BROADWATER and CRESTLINE to I965G and I965GM, respectivelyJani Nikula1-3/+3
2016-12-05drm/i915: Pass crtc state to vlv_compute_wm_level()Ville Syrjälä1-9/+11
2016-12-05drm/i915: Clean up vlv_program_watermarks()Ville Syrjälä1-18/+26
2016-12-05drm/i915: Write all DDL registers in one goVille Syrjälä1-9/+10
2016-12-05drm/i915: Zero out HOWM registers before writing new WM/HOWM register valuesVille Syrjälä1-6/+11
2016-12-05drm/i915: Skip vblank wait if cxsr was already offVille Syrjälä1-7/+24
2016-12-05drm/i915: Protect cxsr state with wm_mutexVille Syrjälä1-4/+10
2016-12-05drm/i915: Pass around dev_priv in vlv wm functionsVille Syrjälä1-13/+11
2016-12-05drm/i915: Introduce vlv_invert_wm_value()Ville Syrjälä1-4/+17
2016-12-05drm/i915: Organize vlv/chv watermarks by plane_idVille Syrjälä1-124/+85
2016-12-05drm/i915: Remove duplicated wm setup for vlv and chvVille Syrjälä1-4/+1
2016-12-05drm/i915: Clean up VLV/CHV maxfifo watermark setupVille Syrjälä1-10/+2
2016-12-05drm/i915: Fix the level 0 max_wm hack on VLV/CHVVille Syrjälä1-2/+2
2016-12-05Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queuedDaniel Vetter1-11/+11
2016-12-05drm/i915: Make skl_write_{plane,cursor}_wm() staticVille Syrjälä1-7/+7
2016-12-02drm/i915/glk: Reuse broxton code for geminilakeAnder Conselvan de Oliveira1-3/+3
2016-12-02drm/i915/gen6+: Clear upper data byte during PCODE writeImre Deak1-0/+1
2016-12-01drm/i915: Make intel_pm_setup take dev_privTvrtko Ursulin1-3/+1
2016-12-01drm/i915: Make GEM object alloc/free and stolen created take dev_privTvrtko Ursulin1-2/+2
2016-11-30Merge tag 'drm-misc-next-2016-11-29' of git://anongit.freedesktop.org/git/drm...Dave Airlie1-11/+11
2016-11-23drm/i915: Use enum plane_id in VLV/CHV wm codeVille Syrjälä1-37/+36
2016-11-23drm/i915: Use enum plane_id in SKL wm codeVille Syrjälä1-103/+77
2016-11-23drm/i915: Make skl_write_{plane,cursor}_wm() staticVille Syrjälä1-7/+7
2016-11-17drm/i915: Introduce enableddisabled helperTvrtko Ursulin1-2/+1
2016-11-17drm/i915: dev_priv cleanup in intel_pm.cTvrtko Ursulin1-32/+35
2016-11-17drm: Nuke modifier[1-3]Ville Syrjälä1-11/+11
2016-11-15drm/i915/gen9+: Kill off hw_ddb from intel_crtc.Maarten Lankhorst1-18/+7
2016-11-15drm/i915/gen9+: Preserve old allocation from crtc_state.Maarten Lankhorst1-1/+5
2016-11-15drm/i915/gen9+: Program watermarks as a separate step during evasion, v3.Maarten Lankhorst1-21/+17
2016-11-15drm/i915: Add an atomic evasion step to watermark programming, v4.Maarten Lankhorst1-2/+16
2016-11-14drm/i915/gen9: fix the WM memory bandwidth WA for Y tiling casesPaulo Zanoni1-2/+3
2016-11-11drm/i915: Pass dev_priv to INTEL_INFO everywhere apart from the gen useTvrtko Ursulin1-5/+7
2016-11-01drm/i915: Pass dev_priv to intel_init_pm()Ville Syrjälä1-5/+3
2016-11-01drm/i915: Pass dev_priv to ilk_setup_wm_latency() & co.Ville Syrjälä1-23/+15
2016-11-01drm/i915: Pass dev_priv to intel_suspend_hw()Ville Syrjälä1-6/+4
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