Age | Commit message (Expand) | Author | Files | Lines |
2017-12-05 | drm/i915: add platform tag to WA | Lucas De Marchi | 1 | -1/+1 |
2017-12-05 | drm/i915: follow single notation for workaround number | Lucas De Marchi | 1 | -2/+2 |
2017-12-01 | drm/i915: Remove unsafe i915.enable_rc6 | Chris Wilson | 1 | -98/+44 |
2017-11-24 | drm/i915: Use exponential backoff for wait_for() | Chris Wilson | 1 | -1/+1 |
2017-11-23 | drm/i915: Save/restore irq state for vlv_residency_raw() | Chris Wilson | 1 | -3/+3 |
2017-11-22 | drm/i915: Convert intel_rc6_residency_us to ns | Tvrtko Ursulin | 1 | -14/+13 |
2017-11-22 | drm/i915: Extract intel_get_cagf | Tvrtko Ursulin | 1 | -0/+14 |
2017-11-21 | drm/i915: Use enum i9xx_plane_id for the .get_fifo_size() hooks | Ville Syrjälä | 1 | -17/+19 |
2017-11-20 | drm/i915: Don't use GEN6_RC_VIDEO_FREQ on gen10+ | David Weinehall | 1 | -3/+4 |
2017-11-17 | Revert "drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk" | Radhakrishna Sripada | 1 | -12/+0 |
2017-11-17 | drm/i915: Calculate g4x intermediate watermarks correctly | Maarten Lankhorst | 1 | -7/+20 |
2017-11-17 | drm/i915: Calculate vlv/chv intermediate watermarks correctly, v3. | Maarten Lankhorst | 1 | -6/+18 |
2017-11-14 | drm/i915: Unify SLICE_UNIT_LEVEL_CLKGATE w/a for cnl | Chris Wilson | 1 | -3/+5 |
2017-11-12 | drm/i915: Remove Gen9 WAs with no effect | Oscar Mateo | 1 | -3/+0 |
2017-11-12 | drm/i915: Remove redundant intel_autoenable_gt_powersave() | Chris Wilson | 1 | -66/+0 |
2017-11-10 | drm/i915: Move GT powersaving init to i915_gem_init() | Chris Wilson | 1 | -2/+0 |
2017-11-08 | drm/i915: Move init_clock_gating() back to where it was | Ville Syrjälä | 1 | -26/+18 |
2017-11-07 | drm/i915: Prevent unbounded wm results in g4x_compute_wm() | Chris Wilson | 1 | -7/+7 |
2017-10-27 | drm/i915: Calculate ironlake intermediate watermarks correctly, v2. | Maarten Lankhorst | 1 | -1/+8 |
2017-10-27 | drm/i915: Do not rely on wm preservation for ILK watermarks | Maarten Lankhorst | 1 | -30/+21 |
2017-10-25 | drm/i915/cnl: Allow 2 pixel per clock on Cannonlake. | Rodrigo Vivi | 1 | -1/+2 |
2017-10-24 | drm/i915/cnl: Get RC6 working. | Rodrigo Vivi | 1 | -4/+11 |
2017-10-17 | drm/i915: Use a mask when applying WaProgramL3SqcReg1Default | Oscar Mateo | 1 | -3/+6 |
2017-10-16 | drm/i915/cnl: WaRsUseTimeoutMode | Rodrigo Vivi | 1 | -2/+9 |
2017-10-11 | drm/i915: Introduce separate status variable for RC6 and LLC ring frequency s... | Sagar Arun Kamble | 1 | -22/+32 |
2017-10-11 | drm/i915: Create generic functions to control RC6, RPS | Sagar Arun Kamble | 1 | -46/+70 |
2017-10-11 | drm/i915: Create generic function to setup LLC ring frequency table | Sagar Arun Kamble | 1 | -4/+20 |
2017-10-11 | drm/i915: Rename intel_enable_rc6 to intel_rc6_enabled | Sagar Arun Kamble | 1 | -6/+6 |
2017-10-11 | drm/i915: Name structure in dev_priv that contains RPS/RC6 state as "gt_pm" | Sagar Arun Kamble | 1 | -141/+174 |
2017-10-11 | drm/i915: Move rps.hw_lock to dev_priv and s/hw_lock/pcu_lock | Sagar Arun Kamble | 1 | -36/+36 |
2017-10-11 | drm/i915: Name i915_runtime_pm structure in dev_priv as "runtime_pm" | Sagar Arun Kamble | 1 | -2/+2 |
2017-10-11 | drm/i915: Separate RPS and RC6 handling for CHV | Sagar Arun Kamble | 1 | -6/+24 |
2017-10-11 | drm/i915: Separate RPS and RC6 handling for VLV | Sagar Arun Kamble | 1 | -22/+39 |
2017-10-11 | drm/i915: Separate RPS and RC6 handling for BDW | Sagar Arun Kamble | 1 | -6/+12 |
2017-10-11 | drm/i915: Remove superfluous IS_BDW checks and non-BDW changes from gen8_enab... | Sagar Arun Kamble | 1 | -12/+5 |
2017-10-11 | drm/i915: Separate RPS and RC6 handling for gen6+ | Sagar Arun Kamble | 1 | -14/+29 |
2017-10-10 | drm/i915: Remove I915_MAX_PIPES dependency for DDB allocation | Mika Kahola | 1 | -5/+7 |
2017-10-07 | drm/i915: disable GTT cache for 2M pages | Matthew Auld | 1 | -6/+5 |
2017-10-03 | drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC. | Rodrigo Vivi | 1 | -0/+6 |
2017-09-22 | drm/i915: Rename global i915 to i915_modparams | Michal Wajdeczko | 1 | -3/+3 |
2017-09-18 | drm/i915/cnp: Don't touch other PCH clock gating bits. | Rodrigo Vivi | 1 | -1/+2 |
2017-09-14 | drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS | Ville Syrjälä | 1 | -14/+13 |
2017-09-07 | drm/i915/bxt+: Enable IPC support | Kumar, Mahesh | 1 | -0/+24 |
2017-09-07 | drm/i915/cnl: Extend WM workaround with IPC for CNL | Kumar, Mahesh | 1 | -1/+2 |
2017-09-07 | drm/i915/glk: IPC linetime watermark workaround for GLK | Kumar, Mahesh | 1 | -3/+4 |
2017-09-07 | drm/i915/gen10: Calculate and enable transition WM | Kumar, Mahesh | 1 | -2/+50 |
2017-09-07 | drm/i915/skl+: Optimize WM calculation | Kumar, Mahesh | 1 | -85/+105 |
2017-09-06 | drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk | Rodrigo Vivi | 1 | -0/+13 |
2017-09-05 | drm/i915/cnp: Wa 1181: Fix Backlight issue | Rodrigo Vivi | 1 | -2/+25 |
2017-08-31 | drm/i915: Eliminate obj->state usage in g4x/vlv/chv wm computation | Ville Syrjälä | 1 | -15/+15 |