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drivers
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drm
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i915
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intel_pm.c
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Commit message (
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Author
Files
Lines
2022-05-25
Merge tag 'drm-next-2022-05-25' of git://anongit.freedesktop.org/drm/drm
Linus Torvalds
1
-290
/
+255
2022-05-04
drm/i915: Fix -Wstringop-overflow warning in call to intel_read_wm_latency()
Gustavo A. R. Silva
1
-1
/
+1
2022-04-20
drm/i915: program wm blocks to at least blocks required per line
Vinod Govindapillai
1
-0
/
+19
2022-04-06
drm/i915/adlp: Fix register corruption after DDI clock enabling
Imre Deak
1
-0
/
+3
2022-04-01
drm/i915/display: Add HAS_MBUS_JOINING
José Roberto de Souza
1
-3
/
+3
2022-03-30
drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL
José Roberto de Souza
1
-0
/
+52
2022-03-21
drm/i915: Remove total[] and uv_total[] from ddb allocation
Ville Syrjälä
1
-60
/
+62
2022-03-21
drm/i915: Pre-calculate plane relative data rate
Ville Syrjälä
1
-151
/
+36
2022-03-21
drm/i915: Tweak plane ddb allocation tracking
Ville Syrjälä
1
-63
/
+45
2022-03-21
drm/i915: Treat SAGV block time 0 as SAGV disabled
Ville Syrjälä
1
-4
/
+6
2022-03-18
drm/i915: Rename pre-icl SAGV enable/disable functions
Ville Syrjälä
1
-18
/
+14
2022-03-18
drm/i915: Reject excessive SAGV block time
Ville Syrjälä
1
-0
/
+6
2022-03-18
drm/i915: Probe whether SAGV works on pre-icl
Ville Syrjälä
1
-0
/
+14
2022-03-18
drm/i915: Rework SAGV block time probing
Ville Syrjälä
1
-15
/
+21
2022-03-18
drm/i915: Treat SAGV block time 0 as SAGV disabled
Ville Syrjälä
1
-4
/
+6
2022-03-09
drm/i915: Remove leftover cnl SAGV block time
Ville Syrjälä
1
-3
/
+0
2022-03-08
drm/i915: Don't skip ddb allocation if data_rate==0
Ville Syrjälä
1
-18
/
+12
2022-03-03
drm/i915: Don't skip ddb allocation if data_rate==0
Ville Syrjälä
1
-18
/
+12
2022-03-02
drm/i915: Use str_enabled_disabled()
Lucas De Marchi
1
-2
/
+2
2022-03-02
drm/i915: Use str_yes_no()
Lucas De Marchi
1
-4
/
+6
2022-02-28
drm/i915/wm: use REG_FIELD_{PREP,GET} for PLANE_WM_BLOCKS_MASK
Jani Nikula
1
-2
/
+2
2022-02-24
drm/i915/dg2: Tile 4 plane format support
Stanislav Lisovskiy
1
-0
/
+1
2022-02-18
drm/i915: Pimp icl+ sagv pre/post update
Ville Syrjälä
1
-18
/
+17
2022-02-18
drm/i915: Split pre-icl vs. icl+ SAGV hooks apart
Ville Syrjälä
1
-40
/
+74
2022-02-18
drm/i915: Correctly populate use_sagv_wm for all pipes
Ville Syrjälä
1
-11
/
+11
2022-02-18
drm/i915: Polish ilk+ wm register bits
Ville Syrjälä
1
-29
/
+28
2022-02-18
drm/i915: Clean up SSKPD/MLTR defines
Ville Syrjälä
1
-13
/
+13
2022-02-16
drm/i915: Move MCHBAR registers to their own header
Matt Roper
1
-0
/
+1
2022-02-16
drm/i915: Unconfuse pre-icl vs. icl+ intel_sagv_{pre,post}_plane_update()
Ville Syrjälä
1
-4
/
+6
2022-02-16
drm/i915: Use {active,scaled}_planes to compute ilk watermarks
Ville Syrjälä
1
-6
/
+2
2022-02-11
drm/i915: Extract skl_allocate_plane_ddb()
Ville Syrjälä
1
-17
/
+24
2022-02-11
drm/i915: Introduce skl_plane_ddb_iter
Ville Syrjälä
1
-48
/
+49
2022-02-11
drm/i915: Fix plane relative_data_rate calculation
Ville Syrjälä
1
-61
/
+2
2022-02-11
drm/i915: Extract skl_ddb_entry_init()
Ville Syrjälä
1
-19
/
+25
2022-02-11
drm/i915: Drop pointless dev_priv argument
Ville Syrjälä
1
-6
/
+5
2022-02-09
drm/i915/pm: hide struct drm_i915_clock_gating_funcs
Jani Nikula
1
-0
/
+4
2022-02-08
drm/i915: Fix mbus join config lookup
Ville Syrjälä
1
-1
/
+1
2022-02-08
drm/i915: Fix dbuf slice config lookup
Ville Syrjälä
1
-1
/
+1
2022-02-07
drm/i915: Workaround broken BIOS DBUF configuration on TGL/RKL
Ville Syrjälä
1
-0
/
+68
2022-02-07
drm/i915: Populate pipe dbuf slices more accurately during readout
Ville Syrjälä
1
-5
/
+8
2022-02-07
drm/i915: Allow !join_mbus cases for adlp+ dbuf configuration
Ville Syrjälä
1
-20
/
+46
2022-02-02
drm/i915: Move GT registers to their own header file
Matt Roper
1
-0
/
+1
2022-01-31
Merge drm/drm-next into drm-intel-next
Rodrigo Vivi
1
-4
/
+33
2022-01-26
drm/i915: Use single_enabled_crtc() in i9xx_update_wm()
Ville Syrjälä
1
-15
/
+11
2022-01-26
drm/i915: Use the correct plane source width in watermark calculations
Ville Syrjälä
1
-11
/
+10
2022-01-26
drm/i915: Fix up pixel_rate vs. clock confusion in wm calculations
Ville Syrjälä
1
-30
/
+22
2022-01-26
drm/i915: Don't allocate extra ddb during async flip for DG2
Stanislav Lisovskiy
1
-0
/
+19
2022-01-26
drm/i915: Use wm0 only during async flips for DG2
Stanislav Lisovskiy
1
-1
/
+13
2022-01-26
drm/i915: Pass plane to watermark calculation functions
Stanislav Lisovskiy
1
-16
/
+21
2022-01-24
drm/i915: Clean up pre-skl primary plane registers
Ville Syrjälä
1
-1
/
+1
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