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path: root/drivers/gpu/drm/i915/intel_dpio_phy.c
AgeCommit message (Expand)AuthorFilesLines
2016-04-29drm/i915: Move VLV HDMI lane reset work around logic to intel_dpio_phy.cAnder Conselvan de Oliveira1-0/+15
2016-04-29drm/i915: Unduplicate pre encoder enabling phy codeAnder Conselvan de Oliveira1-0/+30
2016-04-29drm/i915: Unduplicate VLV phy pre pll enabling codeAnder Conselvan de Oliveira1-0/+28
2016-04-29drm/i915: Unduplicate VLV signal level codeAnder Conselvan de Oliveira1-0/+26
2016-04-29drm/i915: Unduplicate CHV encoders' post pll disable codeAnder Conselvan de Oliveira1-0/+33
2016-04-29drm/i915: Unduplicate CHV pre-encoder enabling phy logicAnder Conselvan de Oliveira1-0/+92
2016-04-29drm/i915: Unduplicate CHV phy-releated pre pll enabling codeAnder Conselvan de Oliveira1-0/+81
2016-04-29drm/i915: Unduplicate chv_data_lane_soft_reset()Ander Conselvan de Oliveira1-0/+43
2016-04-29drm/i915: Unduplicate CHV signal level codeAnder Conselvan de Oliveira1-0/+122