summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/intel_ddi.c
AgeCommit message (Expand)AuthorFilesLines
2019-06-17drm/i915: move modesetting output/encoder code under display/Jani Nikula1-4335/+0
2019-06-12drm/i915: Kill INTEL_SUBPLATFORM_AMLVille Syrjälä1-3/+5
2019-06-12drm/i915: Improve WRPLL reference clock readout on HSW/BDWVille Syrjälä1-1/+14
2019-06-12drm/i915: Nuke LC_FREQVille Syrjälä1-4/+2
2019-06-12drm/i915: Rename HSW/BDW PLL bitsVille Syrjälä1-8/+8
2019-06-07drm/i915: Move intel_dp->prepare_link_train assignment into ddi codeVille Syrjälä1-1/+4
2019-05-28drm/i915: Add state readout for DRM infoframeUma Shankar1-0/+3
2019-05-23drm/i915/dp: Change a link bandwidth computation for DPGwan-gyeong Mun1-1/+2
2019-05-23drm/i915/dp: Add a support of YCBCR 4:2:0 to DP MSAGwan-gyeong Mun1-0/+8
2019-05-23drm/i915/dp: Program VSC Header and DB for Pixel Encoding/Colorimetry FormatGwan-gyeong Mun1-0/+1
2019-05-09drm/i915: Add readout and state check for pch_pfit.force_thruVille Syrjälä1-4/+8
2019-05-03drm/i915: extract intel_gmbus.h from i915_drv.h and rename intel_i2c.cJani Nikula1-0/+1
2019-05-03drm/i915: extract intel_dpio_phy.h from i915_drv.hJani Nikula1-0/+1
2019-05-02drm/i915/icl: Add missing combo PHY lane power setupImre Deak1-0/+10
2019-04-30drm/i915: extract intel_vdsc.h from intel_drv.h and i915_drv.hJani Nikula1-0/+1
2019-04-30drm/i915: extract intel_hotplug.h from intel_drv.h and i915_drv.hJani Nikula1-0/+1
2019-04-30drm/i915: extract intel_dp_link_training.h from intel_drv.hJani Nikula1-0/+1
2019-04-30drm/i915: extract intel_fifo_underrun.h from intel_drv.hJani Nikula1-0/+1
2019-04-23drm/i915/icl: Fix MG_DP_MODE() register programmingImre Deak1-10/+8
2019-04-12drm/i915: Restore correct bxt_ddi_phy_calc_lane_lat_optim_mask() calculationVille Syrjälä1-2/+4
2019-04-10drm/i915/icl: Fix port disable sequence for mipi-dsiVandita Kulkarni1-3/+3
2019-04-08drm/i915: Get power refs in encoder->get_power_domains()Imre Deak1-9/+8
2019-04-08drm/i915: extract intel_hdmi.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_dp.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_panel.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_hdcp.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_lspcon.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_psr.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_connector.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_ddi.h from intel_drv.hJani Nikula1-0/+1
2019-04-08drm/i915: extract intel_audio.h from intel_drv.hJani Nikula1-0/+2
2019-03-27drm/i915: Update TRANS_MSA_MISC for fastsetsVille Syrjälä1-0/+2
2019-03-26drm/i915: switch intel_wait_for_register to uncoreDaniele Ceraolo Spurio1-1/+1
2019-03-26drm/i915/icl: reduce pll_id scope and use enum typeLucas De Marchi1-2/+3
2019-03-26drm/i915/icl: use previous pll hw readoutLucas De Marchi1-19/+18
2019-03-26drm/i915/cnl: use previous pll hw readoutLucas De Marchi1-28/+16
2019-03-26drm/i915/bxt: make bxt_calc_pll_link() similar to sklLucas De Marchi1-15/+9
2019-03-26drm/i915/skl: use previous pll hw readoutLucas De Marchi1-30/+20
2019-03-19drm/i915: Nuke icl_calc_dp_combo_pll_link()Ville Syrjälä1-5/+1
2019-03-19drm/i915: Fix readout for cnl DPLL kdiv==3Ville Syrjälä1-2/+2
2019-03-13drm/i915/gen11+: First assume next platforms will inherit stuffRodrigo Vivi1-9/+9
2019-03-04drm/i915: allow platforms without eDP transcoderLucas De Marchi1-3/+3
2019-03-04drm/i915: Forcing a modeset when resetting HDMI linkJosé Roberto de Souza1-1/+1
2019-03-04drm/i915: Don't manually add connectors and planes stateJosé Roberto de Souza1-8/+0
2019-03-04drm/i915: Fix atomic state leak when resetting HDMI linkJosé Roberto de Souza1-6/+1
2019-02-26drm/i915: Read out HDMI infoframesVille Syrjälä1-0/+12
2019-02-26drm/i915: Store mask of enabled infoframes in the crtc stateVille Syrjälä1-1/+4
2019-02-26drm/i915: Return the mask of enabled infoframes from ->inforame_enabled()Ville Syrjälä1-1/+1
2019-02-25drm/i915: Call MG_DP_MODE() macro with the right parameters orderJosé Roberto de Souza1-5/+5
2019-02-14drm/i915: Make MG PHY macros semantically consistentAditya Swarup1-22/+22
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-03 00:23:41 +0000