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path:
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drivers
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gpu
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drm
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i915
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gvt
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mmio_context.c
Age
Commit message (
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Author
Files
Lines
2019-10-24
drm/i915/gt: Split intel_ring_submission
Chris Wilson
1
-0
/
+1
2019-08-13
drm/i915/gvt: factor out tlb and mocs register offset table
Zhi Wang
1
-18
/
+39
2019-05-28
drm/i915: Move more GEM objects under gem/
Chris Wilson
1
-0
/
+1
2019-05-28
Merge tag 'drm-intel-next-2019-05-24' of git://anongit.freedesktop.org/drm/dr...
Dave Airlie
1
-2
/
+1
2019-05-21
drm/i915/gvt: add 0x4dfc to gen9 save-restore list
Yan Zhao
1
-0
/
+1
2019-05-21
drm/i915/gvt: Tiled Resources mmios are in-context mmios for gen9+
Yan Zhao
1
-6
/
+6
2019-05-21
drm/i915/gvt: use cmd to restore in-context mmios to hw for gen9 platform
Yan Zhao
1
-7
/
+3
2019-05-05
drm/i915/gvt: Add in context mmio 0x20D8 to gen9 mmio list
Colin Xu
1
-0
/
+1
2019-04-26
drm/i915/gvt: Pin the per-engine GVT shadow contexts
Chris Wilson
1
-2
/
+1
2019-04-16
drm/i915/gvt: Fix incorrect mask of mmio 0x22028 in gen8/9 mmio list
Colin Xu
1
-2
/
+2
2019-03-26
drm/i915: switch intel_uncore_forcewake_for_reg to intel_uncore
Daniele Ceraolo Spurio
1
-5
/
+6
2019-03-20
drm/i915: use intel_uncore for all forcewake get/put
Daniele Ceraolo Spurio
1
-4
/
+4
2019-03-08
drm/i915: Move over to intel_context_lookup()
Chris Wilson
1
-1
/
+2
2019-03-05
drm/i915: Store the BIT(engine->id) as the engine's mask
Chris Wilson
1
-113
/
+115
2019-01-24
Merge tag 'gvt-next-2019-01-24' of https://github.com/intel/gvt-linux into dr...
Rodrigo Vivi
1
-11
/
+7
2019-01-10
drm/i915/gvt: Enable gfx virtualiztion for CFL
fred gao
1
-11
/
+7
2018-11-26
Merge tag 'gvt-fixes-2018-11-26' of https://github.com/intel/gvt-linux into d...
Joonas Lahtinen
1
-0
/
+2
2018-11-12
drm/i915/gvt: not to touch undefined MOCS registers
Xinyun Liu
1
-0
/
+2
2018-11-07
Merge tag 'gvt-fixes-2018-11-07' of https://github.com/intel/gvt-linux into d...
Joonas Lahtinen
1
-1
/
+1
2018-10-31
drm/i915/gvt: correct mask setting for CSFE_CHICKEN1
Xinyun Liu
1
-1
/
+1
2018-09-27
BackMerge v4.19-rc5 into drm-next
Dave Airlie
1
-2
/
+0
2018-09-11
Merge tag 'drm-intel-next-2018-09-06-2' of git://anongit.freedesktop.org/drm/...
Dave Airlie
1
-13
/
+0
2018-08-30
drm/i915/gvt: move intel_runtime_pm_get out of spin_lock in stop_schedule
Hang Yuan
1
-2
/
+0
2018-08-07
drm/i915/gvt: Move some MMIO definitions to reg.h
Zhenyu Wang
1
-13
/
+0
2018-07-30
BackMerge v4.18-rc7 into drm-next
Dave Airlie
1
-1
/
+3
2018-07-05
drm/i915/gvt: update vreg on inhibit context lri command
Hang Yuan
1
-1
/
+3
2018-06-13
drm/i915/gvt: Enable mmio context init and switch for BXT.
Colin Xu
1
-5
/
+11
2018-05-18
drm/i915: Store a pointer to intel_context in i915_request
Chris Wilson
1
-3
/
+3
2018-04-30
drm/i915: Wrap engine->context_pin() and engine->context_unpin()
Chris Wilson
1
-1
/
+1
2018-03-28
Backmerge tag 'v4.16-rc7' into drm-next
Dave Airlie
1
-0
/
+3
2018-03-09
drm/i915/gvt: Add runtime_pm_get/put into gvt_switch_mmio
Xiong Zhang
1
-0
/
+2
2018-03-06
drm/i915/gvt: init mmio by lri command in vgpu inhibit context
Weinan Li
1
-3
/
+169
2018-03-06
drm/i915/gvt: add interface to check if context is inhibit
Weinan Li
1
-10
/
+14
2018-03-06
drm/i915/gvt: add define GEN9_MOCS_SIZE
Weinan Li
1
-6
/
+8
2018-02-14
drm/i915/gvt: add 0xe4f0 into gen9 render list
Weinan Li
1
-0
/
+1
2018-02-01
drm/i915/gvt: Do not use I915_NUM_ENGINES to iterate over the mocs regs array
Michel Thierry
1
-1
/
+1
2018-02-01
drm/i915/gvt: Fix gen8/9_render_mmio_list[0] don't take effect
Xiong Zhang
1
-4
/
+4
2017-12-22
drm/i915/gvt: cleanup usage for typed mmio reg vs. offset
Zhenyu Wang
1
-10
/
+10
2017-12-18
drm/i915/gvt: load host render mocs once in mocs switch
Weinan Li
1
-9
/
+42
2017-12-18
drm/i915/gvt: refine mocs save restore policy
Weinan Li
1
-15
/
+18
2017-12-18
drm/i915/gvt: optimize for vGPU mmio switch
Weinan Li
1
-111
/
+85
2017-12-18
drm/i915/gvt: refine trace_render_mmio
Weinan Li
1
-2
/
+2
2017-12-14
Merge tag 'gvt-next-2017-12-14' of https://github.com/intel/gvt-linux into dr...
Rodrigo Vivi
1
-0
/
+402
2017-12-08
drm/i915/gvt: Rename file render.{c, h} to mmio_context.{c, h}
Changbin Du
1
-0
/
+403