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path: root/drivers/gpu/drm/i915/gvt/gtt.h
AgeCommit message (Expand)AuthorFilesLines
2018-03-30drm/i915/gvt: Cancel dma map when resetting ggtt entriesChangbin Du1-1/+1
2018-03-19drm/i915/gvt: Invalidate vGPU PPGTT mm objects during a vGPU reset.Zhi Wang1-0/+1
2018-03-06drm/i915/gvt: Manage shadow pages with radix treeChangbin Du1-3/+1
2018-03-06drm/i915/gvt: Provide generic page_track infrastructure for write-protected pageChangbin Du1-14/+0
2018-03-06drm/i915/gvt: Rename shadow_page to short name sptChangbin Du1-1/+1
2018-03-06drm/i915/gvt: Rework shadow page management codeChangbin Du1-32/+19
2018-03-06drm/i915/gvt: Factor out intel_vgpu_{get, put}_ppgtt_mm interfaceChangbin Du1-2/+2
2018-03-06drm/i915/gvt: Rename ggtt related functions to be more specificChangbin Du1-2/+2
2018-03-06drm/i915/gvt: Refine ggtt and ppgtt root entry opsChangbin Du1-34/+0
2018-03-06drm/i915/gvt: Refine the intel_vgpu_mm reference managementChangbin Du1-11/+17
2018-03-06drm/i915/gvt: Rework shadow graphic memory management codeChangbin Du1-37/+43
2017-12-22drm/i915/gvt: move write protect handler out of mmio emulation functionZhenyu Wang1-0/+3
2017-11-16Revert "drm/i915/gvt: Refine broken PPGTT scratch"Zhenyu Wang1-6/+11
2017-11-16drm/i915/gvt: Refine broken PPGTT scratchZhi Wang1-11/+6
2017-11-16drm/i915/gvt: Introduce ops->set_present()Zhi Wang1-0/+1
2017-11-16drm/i915/gvt: Let the caller choose if a shadow page should be put into hash ...Zhi Wang1-2/+2
2017-11-16drm/i915/gvt: Use I915_GTT_PAGE_SIZEZhi Wang1-4/+3
2017-11-16drm/i915/gvt: Factor intel_vgpu_page_trackZhi Wang1-17/+13
2017-08-10drm/i915/gvt: Refine the intel_vgpu_reset_gtt reset functionChuanxiao Dong1-1/+1
2017-08-10drm/i915/gvt: Add carefully checking in GTT walker pathsChangbin Du1-10/+14
2017-01-13drm/i915/gvt: introuduce intel_vgpu_reset_gtt() to reset gttChangbin Du1-0/+1
2016-12-26drm/i915/gvt: reset the GGTT entry when vGPU createdPing Gao1-0/+4
2016-11-07drm/i915/gvt: implement scratch page table tree for shadow PPGTTPing Gao1-2/+38
2016-10-14drm/i915/gvt: vGPU graphics memory virtualizationZhi Wang1-0/+270
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