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path: root/drivers/gpu/drm/i915/gt/intel_workarounds.c
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2020-12-14Merge tag 'drm-next-2020-12-11' of git://anongit.freedesktop.org/drm/drmLinus Torvalds1-30/+113
2020-11-16drm/i915: Avoid memory leak with more than 16 workarounds on a listTvrtko Ursulin1-1/+3
2020-10-15drm/i915/dg1: Add initial DG1 workaroundsStuart Summers1-22/+89
2020-10-14drm/i915/jsl: Split EHL/JSL platform info and PCI idsTejas Upadhyay1-2/+2
2020-10-09drm/i915: Update gen12 multicast register rangesMatt Roper1-6/+22
2020-09-17drm/i915/tgl, rkl: Make Wa_1606700617/22010271021 permanentSwathi Dhanavanthri1-3/+4
2020-09-11Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi1-14/+29
2020-09-07drm/i915: Kill last user of intel_context_create_request outside of selftestsMaarten Lankhorst1-14/+29
2020-08-28drm/i915/tgl: Fix stepping WA matchingJosé Roberto de Souza1-5/+18
2020-08-26drm/i915/gt: Implement WA_1406941453Clint Taylor1-0/+7
2020-08-17drm/i915/kbl: Fix revision ID checksMatt Roper1-3/+21
2020-08-17drm/i915/rkl: Add initial workaroundsMatt Roper1-32/+57
2020-07-09drm/i915/tgl: Implement WAs 18011464164 and 22010931296José Roberto de Souza1-5/+8
2020-07-08drm/i915/sseu: Move sseu_info under gt_infoVenkata Sandeep Dhanalakota1-4/+4
2020-06-11drm/i915/gt: Move gen4 GT workarounds from init_clock_gating to workaroundsChris Wilson1-5/+22
2020-06-11drm/i915/gt: Move ilk GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+14
2020-06-11drm/i915/gt: Move snb GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+41
2020-06-11drm/i915/gt: Move vlv GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+59
2020-06-11drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+62
2020-06-11drm/i915/gt: Move hsw GT workarounds from init_clock_gating to workaroundsChris Wilson1-0/+48
2020-06-04drm/i915/tgl: Implement WA_16011163337Clint Taylor1-4/+7
2020-06-03drm/i915: Drop i915_request.i915 backpointerChris Wilson1-2/+2
2020-06-02drm/i915/gt: Make the CTX_TIMESTAMP readable on !rcsChris Wilson1-1/+24
2020-06-02drm/i915: Identify Cometlake platformChris Wilson1-6/+12
2020-06-02drm/i915/gt: Move legacy context wa to intel_workaroundsChris Wilson1-0/+31
2020-05-20drm/i915/ehl: Wa_22010271021Matt Atwood1-0/+6
2020-05-12drm/i915/ehl: Restrict w/a 1607087056 for EHL/JSLSwathi Dhanavanthri1-4/+7
2020-05-04drm/i915: Remove cnl pre-prod workaroundsVille Syrjälä1-17/+0
2020-04-15drm/i915/tgl: Initialize multicast register steering for workaroundsMatt Roper1-0/+2
2020-04-02drm/i915/tgl: Make Wa_14010229206 permanentSwathi Dhanavanthri1-6/+6
2020-03-19drm/i915/workarounds: convert to drm_device based logging macros.Wambui Karuga1-3/+4
2020-03-13drm/i915: Add Wa_1605460711 / Wa_1408767742 to ICL and EHLMatt Roper1-0/+8
2020-03-13drm/i915: Apply Wa_1406680159:icl,ehl as an engine workaroundMatt Roper1-5/+5
2020-03-13drm/i915: Add Wa_1406306137:icl,ehlMatt Roper1-0/+3
2020-03-13drm/i915: Add Wa_1604278689:icl,ehlMatt Roper1-0/+6
2020-03-13drm/i915: Handle all MCR rangesMatt Roper1-3/+22
2020-03-09drm/i915/tgl: Don't treat unslice registers as maskedMatt Roper1-6/+6
2020-03-06drm/i915/tgl: Make Wa_1606700617 permanentSwathi Dhanavanthri1-5/+5
2020-03-05drm/i915/tgl: WaDisableGPGPUMidThreadPreemptionTvrtko Ursulin1-2/+7
2020-03-03drm/i915/tgl: Move and restrict Wa_1408615072José Roberto de Souza1-0/+4
2020-03-03drm/i915/gen11: Moving WAs to rcs_engine_wa_init()José Roberto de Souza1-0/+15
2020-03-02drm/i915/tgl: Add Wa number to WaAllowPMDepthAndInvocationCountAccessFromUMDJosé Roberto de Souza1-0/+1
2020-03-02drm/i915/tgl: Add note about Wa_1409142259José Roberto de Souza1-1/+9
2020-03-02drm/i915/tgl: Fix the Wa number of a fixJosé Roberto de Souza1-1/+1
2020-03-02drm/i915/tgl: Add note about Wa_1607063988José Roberto de Souza1-1/+4
2020-03-02drm/i915/tgl: Add note to Wa_1607297627José Roberto de Souza1-3/+7
2020-03-02drm/i915/tgl: Extend Wa_1606931601 for all steppingsAnusha Srivatsa1-5/+3
2020-03-02drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood1-0/+6
2020-03-02drm/i915/tgl: Implement Wa_1806527549José Roberto de Souza1-0/+3
2020-03-02drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza1-0/+6
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