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path: root/drivers/gpu/drm/i915/display
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2019-08-06Merge tag 'drm-intel-next-2019-07-30' of git://anongit.freedesktop.org/drm/dr...Dave Airlie39-1696/+3813
2019-07-30drm/i915: use upstream version of header testsJani Nikula2-17/+2
2019-07-29drm/i915: Fix the TBT AUX power well enablingImre Deak1-2/+9
2019-07-29drm/i915/vbt: Fix VBT parsing for the PSR sectionDhinakaran Pandiyan2-4/+4
2019-07-29drm/i915: Make sure cdclk is high enough for DP audio on VLV/CHVVille Syrjälä1-0/+11
2019-07-29drm/i915: Deal with machines that expose less than three QGV pointsVille Syrjälä1-5/+10
2019-07-29drm/i915: Fix various tracepoints for gen2Ville Syrjälä1-2/+2
2019-07-26drm/i915/tgl: select correct bit for port selectMahesh Kumar2-11/+42
2019-07-26drm/i915/tgl: skip setting PORT_CL_DW12_* on initializationLucas De Marchi1-4/+8
2019-07-25drm/i915: Mark expected switch fall-throughsGustavo A. R. Silva2-1/+2
2019-07-19drm/i915/dsi: remove set but not used variable 'hfront_porch'YueHaibing1-3/+1
2019-07-19drm/i915: Remove set but not used variable 'src_y'YueHaibing1-2/+1
2019-07-18drm/i915/vbt: Fix VBT parsing for the PSR sectionDhinakaran Pandiyan2-4/+4
2019-07-18drm/i915: Make sure cdclk is high enough for DP audio on VLV/CHVVille Syrjälä1-0/+11
2019-07-18drm/i915/ehl: Use an id of 4 while accessing DPLL4's CR0 and CR1Vivek Kasireddy1-4/+14
2019-07-15drm/i915: Enable hotplug retryJosé Roberto de Souza3-1/+55
2019-07-15drm/i915: Add support for retrying hotplugImre Deak5-28/+68
2019-07-15drm/i915/ehl: Map MCC pins based on PHY, not portMatt Roper1-5/+6
2019-07-12drm/i915/gt: Use intel_gt as the primary object for handling resetsChris Wilson1-9/+13
2019-07-12drm/i915: Add modular FIAAnusha Srivatsa2-8/+45
2019-07-12drm/i915/display: Drop kerneldoc for 'intel_atomic_commit'Chris Wilson1-12/+0
2019-07-12drm/i915: Skip SINK_COUNT read on CH7511Ville Syrjälä1-5/+9
2019-07-12drm/i915: Propagate "_remove" function name suffix downJanusz Krzysztofik5-8/+8
2019-07-12drm/i915: Replace "_load" with "_probe" consequentlyJanusz Krzysztofik1-1/+1
2019-07-11drm/i915/tgl: Update DPLL clock reference registerJosé Roberto de Souza1-2/+6
2019-07-11drm/i915/tgl: Add DPLL registersLucas De Marchi1-5/+19
2019-07-11drm/i915/tgl: Add vbt value mapping for DDC Bus pinMahesh Kumar2-1/+19
2019-07-11drm/i915/tgl: port to ddc pin mappingLucas De Marchi1-27/+9
2019-07-11drm/i915/tgl: Add gmbus gpio pin to port mappingMahesh Kumar2-2/+20
2019-07-11drm/i915/gen12: MBUS B credit changeRodrigo Vivi1-2/+8
2019-07-11drm/i915/tgl: apply Display WA #1178 to fix type C donglesLucas De Marchi1-3/+9
2019-07-11drm/i915/tgl: init ddi port A-C for Tiger LakeMahesh Kumar1-2/+7
2019-07-11drm/i915/tgl: Add additional PHYs for Tiger LakeLucas De Marchi2-1/+7
2019-07-11drm/i915/tgl: Add additional ports for Tiger LakeVandita Kulkarni3-0/+23
2019-07-11drm/i915/tgl: Add pll managerVandita Kulkarni1-1/+18
2019-07-11drm/i915/tgl: Add new pll idsVandita Kulkarni1-5/+18
2019-07-11drm/i915/tgl: Add power well to support 4th pipeMika Kahola2-3/+28
2019-07-11drm/i915/tgl: Add power well supportImre Deak2-15/+485
2019-07-11drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder AJosé Roberto de Souza3-8/+15
2019-07-11drm/i915: Add 4th pipe and transcoderLucas De Marchi2-1/+6
2019-07-11drm/i915: Don't overestimate 4:2:0 link symbol clockVille Syrjälä1-1/+3
2019-07-11drm/i915: Don't pass stack garbage to pcode in the second data registerVille Syrjälä1-1/+1
2019-07-11drm/i915: Use intel_ types in intel_atomic_commit()Ville Syrjälä1-39/+37
2019-07-11drm/i915: Use intel_ types in intel_{lock,modeset}_all_pipes()Ville Syrjälä1-17/+21
2019-07-11drm/i915: Polish intel_atomic_track_fbs()Ville Syrjälä1-8/+9
2019-07-11drm/i915: Polish intel_shared_dpll_swap_state()Ville Syrjälä3-15/+9
2019-07-11drm/i915: Simplify modeset_get_crtc_power_domains() argumentsVille Syrjälä1-11/+10
2019-07-11drm/i915: Use the "display core" power domain in vlv/chv set_cdclk()Ville Syrjälä1-6/+6
2019-07-11drm/i915/sdvo: Fix handling if zero hbuf sizeVille Syrjälä1-13/+19
2019-07-10drm/i915/ehl: Enable DDI-DMatt Roper1-0/+1